74actq273 Fairchild Semiconductor, 74actq273 Datasheet

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74actq273

Manufacturer Part Number
74actq273
Description
Quiet Series Octal D-type Flip-flop
Manufacturer
Fairchild Semiconductor
Datasheet

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© 2001 Fairchild Semiconductor Corporation
74ACTQ273SC
74ACTQ273SJ
74ACTQ273MTC
74ACTQ273PC
74ACTQ273
Quiet Series Octal D-Type Flip-Flop
General Description
The ACTQ273 has eight edge-triggered D-type flip-flops
with individual D inputs and Q outputs. The common buff-
ered Clock (CP) and Master Reset (MR) input load and
reset (clear) all flip-flops simultaneously.
The register is fully edge-triggered. The state of each D-
type input, one setup time before the LOW-to-HIGH clock
transition, is transferred to the corresponding flip-flop’s Q
output.
All outputs will be forced LOW independently of Clock or
Data inputs by a LOW voltage level on the MR input. The
device is useful for applications where the true output only
is required and the Clock and Master Reset are common to
all storage elements.
The ACTQ utilizes Fairchild Quiet Series
guarantee quiet output switching and improved dynamic
threshold performance. FACT Quiet Series
GTO
to a split ground bus for superior performance.
Ordering Code:
Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.
Connection Diagram
FACT , FACT Quiet Series , and GTO
Order Number
output control and undershoot corrector in addition
Package Number
MTC20
M20B
M20D
N20A
are trademarks of Fairchild Semiconductor Corporation.
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide
20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide
technology to
features
DS010585
Features
Pin Descriptions
I
Guaranteed simultaneous switching noise level and
dynamic threshold performance
Guaranteed pin-to-pin skew AC performance
Improved latch-up immunity
Buffered common clock and asynchronous master reset
Outputs source/sink 24 mA
4 kV minimum ESD immunity
CC
reduced by 50%
Package Description
D
MR
CP
Q
Pin Names
0
0
–D
–Q
7
7
Data Inputs
Master Reset
Clock Pulse Input
Data Outputs
August 1989
Revised August 2001
Description
www.fairchildsemi.com

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74actq273 Summary of contents

Page 1

... Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide 74ACTQ273MTC MTC20 20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide 74ACTQ273PC N20A 20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code. ...

Page 2

Logic Symbols Mode Select-Function Table Operating Mode Reset (Clear) Load “1” Load “0” H HIGH Voltage Level L LOW Voltage Level  X Immaterial LOW-to-HIGH Transition Logic Diagram Please note that this diagram is provided only for the understanding of ...

Page 3

Absolute Maximum Ratings Supply Voltage ( Input Diode Current ( 0. 0. Input Voltage ( Output Diode Current ( ...

Page 4

AC Electrical Characteristics Symbol Parameter f Maximum Clock MAX Frequency t Propagation Delay PLH PHL n t Propagation Delay PHL Output to Output OSHL t Skew (Note 7) OSLH Note ...

Page 5

FACT Noise Characteristics The setup of a noise characteristics measurement is critical to the accuracy and repeatability of the tests. The following is a brief description of the setup used to measure the noise characteristics of FACT. Equipment: Hewlett Packard ...

Page 6

Physical Dimensions inches (millimeters) unless otherwise noted 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide www.fairchildsemi.com Package Number M20B 6 ...

Page 7

Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide Package Number M20D 7 www.fairchildsemi.com ...

Page 8

Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide www.fairchildsemi.com Package Number MTC20 8 ...

Page 9

Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right ...

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