74actq652mtc Fairchild Semiconductor, 74actq652mtc Datasheet - Page 3

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74actq652mtc

Manufacturer Part Number
74actq652mtc
Description
Quiet Series ?ransceiver/register
Manufacturer
Fairchild Semiconductor
Datasheet
Functional Description
In the transceiver mode, data present at the HIGH imped-
ance port may be stored in either the A or B register or
both.
The select (SAB, SBA) controls can multiplex stored and
real-time.
The examples in Figure 1 demonstrate the four fundamen-
tal bus-management functions that can be performed with
the Octal bus transceivers and receivers.
OEAB OEBA CPAB CPBA
OEAB OEBA CPAB CPBA
X
L
L
L
Transfer Bus B to Bus A
H
H
X
L
Note A: Real-Time
Note C: Storage

 
X
X

X
X
SAB
SAB
X
X
X
X
SBA
SBA
X
X
X
L
FIGURE 1.
3
Data on the A or B data bus, or both can be stored in the
internal D-type flip-flop by LOW-to-HIGH transitions at the
appropriate Clock Inputs (CPAB, CPBA) regardless of the
Select or Output Enable Inputs. When SAB and SBA are in
the real time transfer mode, it is also possible to store data
without using the internal D-type flip-flops by simulta-
neously enabling OEAB and OEBA. In this configuration
each Output reinforces its Input. Thus when all other data
sources to the two sets of bus lines are in a HIGH imped-
ance state, each set of bus lines will remain at its last state.
OEAB OEBA CPAB CPBA
OEAB OEBA CPAB CPBA
H
H
Note D: Transfer Storage
Transfer Bus A to Bus B
H
L
Note B: Real-Time
Data to A or B
H or L H or L
X
X
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SAB
SAB
H
L
SBA
SBA
X
H

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