74act521scx-nl Fairchild Semiconductor, 74act521scx-nl Datasheet

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74act521scx-nl

Manufacturer Part Number
74act521scx-nl
Description
74ac521 * 74act521 8-bit Identity Comparator
Manufacturer
Fairchild Semiconductor
Datasheet
© 2005 Fairchild Semiconductor Corporation
74AC521SC
74AC521SJ
74AC521MTC
74AC521PC
74ACT521SC
74ACT521SJ
74ACT521MTC
74ACT521PC
74AC521 • 74ACT521
8-Bit Identity Comparator
General Description
The AC/ACT521 is an expandable 8-bit comparator. It com-
pares two words of up to eight bits each and provides a
LOW output when the two words match bit for bit. The
expansion input I
input.
Ordering Code:
Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering table.
Pb-Free package per JEDEC J-STD-020B.
Logic Symbols
FACT
Order Number
¥
is a trademark of Fairchild Semiconductor Corporation.
A
Package Number
B
also serves as an active LOW enable
MTC20
MTC20
M20D
M20D
IEEE/IEC
M20B
N20A
M20B
N20A
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide
Pb-Free 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide
Pb-Free 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide
DS009964
Features
Connection Diagram
Pin Descriptions
I
Compares two 8-bit words in 6.5 ns typ
Expandable to any word length
20-pin package
Outputs source/sink 24 mA
ACT521 has TTL-compatible inputs
CC
A
B
T
O
reduced by 50%
A
Package Description
0
0
A
–A
–B
Pin Names
B
B
7
7
Word A Inputs
Word B Inputs
Expansion or Enable Input
Identity Output
November 1988
Revised March 2005
Description
www.fairchildsemi.com

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74act521scx-nl Summary of contents

Page 1

... Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering table. Pb-Free package per JEDEC J-STD-020B. Logic Symbols IEEE/IEC ¥ FACT is a trademark of Fairchild Semiconductor Corporation. © 2005 Fairchild Semiconductor Corporation Features I reduced by 50% CC Compares two 8-bit words in 6.5 ns typ ...

Page 2

Truth Table Inputs (Note (Note HIGH Voltage Level L LOW Voltage Level Note ...

Page 3

Absolute Maximum Ratings Supply Voltage ( Input Diode Current ( 0. 0. Input Voltage ( Output Diode Current ( ...

Page 4

DC Electrical Characteristics for ACT Symbol Parameter V Minimum HIGH Level IH Input Voltage V Maximum LOW Level IL Input Voltage V Minimum HIGH Level OH Output Voltage V Maximum LOW Level OL Output Voltage I Maximum Input IN Leakage ...

Page 5

AC Electrical Characteristics for ACT Symbol Parameter t Propagation Delay PLH Propagation Delay PHL Propagation Delay PLH ...

Page 6

Physical Dimensions inches (millimeters) unless otherwise noted 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide www.fairchildsemi.com Package Number M20B 6 ...

Page 7

Physical Dimensions inches (millimeters) unless otherwise noted (Continued) Pb-Free 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide Package Number M20D 7 www.fairchildsemi.com ...

Page 8

Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide www.fairchildsemi.com Package Number MTC20 8 ...

Page 9

Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right ...

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