74ac533 IK Semicon Co., Ltd, 74ac533 Datasheet

no-image

74ac533

Manufacturer Part Number
74ac533
Description
Octal 3-state Inverting Transparent Latch
Manufacturer
IK Semicon Co., Ltd
Datasheet
Octal 3-State Inverting
Transparent Latch
High-Speed Silicon-Gate CMOS
HC/HCT533. The device inputs are compatible with standard CMOS
outputs; with pullup resistors, they are compatible with LS/ALS outputs.
asynchronously) when Latch Enable is high. The data appears as the
outputs in inverted form. When Latch Enable goes low, data meeting the
setup and hold time becomes latched.
when Output Enable is high, all device outputs are forced to the high-
impedance state. Thus, data may be latched even when the outputs are not
enabled.
• Outputs Directly Interface to CMOS, NMOS, and TTL
• Operating Voltage Range: 2.0 to 6.0 V
• Low Input Current: 1.0 μA; 0.1 μA @ 25°C
• High Noise Immunity Characteristic of CMOS Devices
• Outputs Source/Sink 24 mA
• 3-State Outputs for Bus Interfacing
The IN74AC533 is identical in pinout to the LS/ALS533,
These latches appear transparent to data (i.e., the outputs change
The Output Enable input does not affect the state of the latches, but
LOGIC DIAGRAM
PIN 10 = GND
PIN 20=V
CC
X = don’t care
Z = high impedance
Output
Enable
T
ORDERING INFORMATION
A
L
L
L
H
= -40° to 85° C for all packages
FUNCTION TABLE
PIN ASSIGNMENT
IN74AC533DW SOIC
IN74AC533N Plastic
Inputs
TECHNICAL DATA
Enable
Latch
IN74AC533
H
H
X
L
D
H
X
X
L
change
Output
Rev. 00
no
Q
H
L
Z

Related parts for 74ac533

74ac533 Summary of contents

Page 1

... Octal 3-State Inverting Transparent Latch High-Speed Silicon-Gate CMOS The IN74AC533 is identical in pinout to the LS/ALS533, HC/HCT533. The device inputs are compatible with standard CMOS outputs; with pullup resistors, they are compatible with LS/ALS outputs. These latches appear transparent to data (i.e., the outputs change asynchronously) when Latch Enable is high ...

Page 2

... Unused inputs must always be tied to an appropriate logic voltage level (e.g., either GND or V outputs must be left open. Parameter and GND Pins CC SOIC Package+ Parameter * and V should be constrained to the range GND≤(V IN OUT IN74AC533 Value Unit -0.5 to +7 ±20 mA ±50 mA ±50 mA 750 mW 500 ° ...

Page 3

... OL I = = GND 5 (OE 5 GND GND OUT CC V =1.65 V Max 5.5 OLD V =3.85 V Min 5.5 OHD GND 5 IN74AC533 Guaranteed Limits 25 °C Unit -40°C to 85°C 2.1 2.1 V 3.15 3.15 3.85 3.85 0.9 0.9 V 1.35 1.35 1.65 1.65 2.9 2.9 V 4.4 4.4 5.4 5.4 2.56 2.46 3.86 3.76 4.86 4.76 0.1 0.1 V 0.1 0.1 0.1 0.1 0.36 0.44 0.36 0.44 0.36 0.44 ±0.1 ±1.0 μA ± ...

Page 4

... Voltage Range 3 3.3 V ±0 Voltage Range 5 5.0 V ±0 =50pF, Input t =t =3.0 ns °C V Min 3.3 2.0 5.0 2.0 3.3 2.0 5.0 2.0 3.3 2.0 5.0 2.0 3.3 2.0 5.0 2.0 3.3 2.0 5.0 2.0 3.3 2.0 5.0 2.0 3.3 2.0 5.0 2.0 3.3 2.0 5.0 2.0 5.0 Typical @25°C,V =50pF,Input t =t =3.0 ns °C V 3.3 5.0 3.3 5.0 3.3 5.0 IN74AC533 Guaranteed Limits Unit -40°C to 85°C Max Min Max 14.0 1.5 16.0 ns 10.0 1.5 11.0 13.0 1.5 14.5 ns 9.5 1.5 10.5 14.0 1.5 16.5 ns 10.0 1.5 11.5 13.0 1.5 14.5 ns 10.0 1.5 11.0 12.5 1.5 14.0 ns 9.5 1.5 10.5 12.5 1.5 14.0 ns 9.5 1.5 10.5 13.0 1.5 14.5 ns 10.0 1.5 11.0 13.0 1.5 14.5 ns 10.0 1.5 11.0 4.5 4 ...

Page 5

... Figure 1. Switching Waveforms Figure 3. Switching Waveforms EXPANDED LOGIC DIAGRAM IN74AC533 Figure 2. Switching Waveforms Figure 4. Switching Waveforms Rev. 00 ...

Page 6

... Maximum mold flash or protrusion 0.15 mm (0.006) per side for A; for B ‑ 0.25 mm (0.010) per side. N SUFFIX PLASTIC DIP (MS - 001AD SEATING -T- PLANE SUFFIX SOIC (MS - 013AC SEATING PLANE IN74AC533 Dimension, mm Symbol MIN MAX A 24.89 26.92 B 6.1 7.11 5. 0.36 0.56 F 1.14 1.78 G 2.54 7. 0° 10° K 2.92 3.81 7.62 8. ...

Related keywords