74lcx162541 STMicroelectronics, 74lcx162541 Datasheet

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74lcx162541

Manufacturer Part Number
74lcx162541
Description
Low Voltage Cmos 16-bit Bus Buffer With 5v Tolerant Inputs And Outputs
Manufacturer
STMicroelectronics
Datasheet

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Part Number:
74lcx162541TTR
Manufacturer:
STMicroelectronics
Quantity:
1 925
Order codes
Features
February 2007
5V tolerant inputs and outputs
High speed:
– t
Power down protection on inputs and outputs
Symmetrical output impedance:
– |I
PCI bus levels guaranteed at 12mA
Balanced propagation delays:
– t
26Ω serie resistor in outputs
Operating voltage range:
– V
Pin and function compatible with
74 series 162541
Latch-up performance exceeds 500mA
(JESD 17)
ESD performance:
– HBM > 2000V
(MIL STD 883 method 3015); MM > 200V
PD
PLH
OH
CC
74LCX162541TTR
= 4.4ns (Max) at V
| = I
≅ t
(Opr) = 2.0V to 3.6V
Part number
PHL
OL
= 12mA (Min) at V
CC
= 3V
Low voltage CMOS 16-bit bus buffer (3-state)
CC
= 3V
TSSOP48
Package
Rev 3
with 5V tolerant inputs and outputs
Description
The 74LCX162541 is a low voltage CMOS 16 bit
bus buffer (non-inverted) fabricated with sub-
micron silicon gate and double-layer metal wiring
C
high speed 3.3V applications; it can be interfaced
to 5V signal environment for both inputs and
outputs.
This is composed of two 8-bit sections with
separate output-enable signals. For either 8-bit
buffers section, the 3 state control gate operates
as a two input AND such that if either nG1 and
nG2 are high, all outputs are in the high
impedence state.
This device is designed to be used with 3 state
memory address drivers, etc.
The device circuits is including 26Ω series
resistance in the outputs. These resistors permit
to reduce line noise in high speed applications.
All inputs and outputs are equipped with
protection circuits against static discharge, giving
them 2KV ESD immunity and transient excess
voltage.
2
MOS technology. It is ideal for low power and
TSSOP48
74LCX162541
Tape and reel
Packaging
www.st.com
1/15
15

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74lcx162541 Summary of contents

Page 1

... Low voltage CMOS 16-bit bus buffer (3-state) with 5V tolerant inputs and outputs = Description The 74LCX162541 is a low voltage CMOS 16 bit bus buffer (non-inverted) fabricated with sub- micron silicon gate and double-layer metal wiring 2 C MOS technology ideal for low power and high speed 3.3V applications ...

Page 2

... Contents Contents 1 Logic symbols and I/O equivalent circuit . . . . . . . . . . . . . . . . . . . . . . . . 3 2 Pin settings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 2.1 Pin connection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 2.2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 3 Logic states . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 3.1 Truth table . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 4 Maximum rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 4.1 Recommended operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 5 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 6 Test circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 7 Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 8 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 9 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 2/15 74LCX162541 ...

Page 3

... Logic symbols and I/O equivalent circuit Figure 1. IEC logic symbols Figure 2. Input and output equivalent circuit Logic symbols and I/O equivalent circuit 3/15 ...

Page 4

... Pin settings 2 Pin settings 2.1 Pin connection Figure 3. Pin connection (top through view) 4/15 74LCX162541 ...

Page 5

... Pin description Table 1. Pin description Pin N° 11, 12 13, 14, 16, 17, 19, 20, 22, 23 24, 25 36, 35, 33, 32, 30, 29, 27, 26 47, 46, 44, 43, 41, 40, 38 10, 15, 21, 28, 34, 39 18, 31 Logic states 3.1 Truth table Table 2. Truth table ...

Page 6

... High or low level output current ( Operating temperature op dt/dv Input rise and fall time 1. Truth table guaranteed: 1. from 0. 6/15 Parameter (1) (2) Parameter (1) = 3.0 to 3.6V 2.7V) CC (2) = 3.0V CC 74LCX162541 Value Unit -0.5 to +7.0 V -0.5 to +7.0 V -0.5 to +7 -50 mA -50 mA ±50 mA ± 100 mA ± 100 mA -65 to +150 °C 300 ° ...

Page 7

... Electrical characteristics Table 5. DC specification Symbol High level input V IH voltage Low level input V IL voltage High level output V OH voltage Low level output V OL voltage I Input leakage current 2.7 to 3.6 I Power OFF leakage I off current High impedance I output leakage OZ current ...

Page 8

... I 8/15 Test Condition (V) (pF) 2.7 50 3.0 to 3.6 2.7 50 3.0 to 3.6 2.7 50 3.0 to 3.6 3.0 to 3.6 50 (1) (2) |) PHLn Test Condition Parameter V CC (V) 3.3 ( CC(opr 74LCX162541 Value - ° (Ω) (ns) Min Max 1.5 500 2.5 1.5 1.5 500 2.5 1.5 1.5 500 2.5 1.5 500 2 OSLH PLHm Value °C A Min ...

Page 9

... Test circuit Figure 4. Test circuit Figure 5. Test circuit C = 50pF or equivalent (includes jig and probe capacitance) L Ω 500 pulse generator (typically 50 T OUT Test PLH PHL PZL PLZ PZH PHZ or equivalent Ω ) Test circuit Switch ...

Page 10

... Waveforms 7 Waveforms Figure 6. Propagation delays (f = 1MHz; 50% duty cycle) Figure 7. Output enable and disable time (f = 1MHz; 50% duty cycle) 10/15 74LCX162541 ...

Page 11

... Package mechanical data In order to meet environmental requirements, ST offers these devices in ECOPACK® packages. These packages have a Lead-free second level interconnect . The category of second level interconnect is marked on the package and on the inner box label, in compliance with JEDEC Standard JESD97. The maximum ratings related to soldering conditions are also marked on the inner box label ...

Page 12

... PIN 1 IDENTIFICATION 12/15 TSSOP48 MECHANICAL DATA mm. MIN. TYP MAX. 1.2 0.05 0.15 0.9 0.17 0.27 0.09 0.20 12.4 12.6 8.1 BSC 6.0 6.2 0.5 BSC 0° 8° 0.45 0. 74LCX162541 inch MIN. TYP. MAX. 0.047 0.002 0.006 0.035 0.0067 0.011 0.0035 0.0079 0.488 0.496 0.318 BSC 0.236 0.244 0.0197 BSC 0° 0.018 0.030 7065588D 8° ...

Page 13

... DIM Tape & Reel TSSOP48 MECHANICAL DATA mm. MIN. TYP MAX. 330 12.8 13.2 20.2 60 30.4 8.7 8.9 13.1 13.3 1.5 1.7 3.9 4.1 11.9 12.1 Package mechanical data inch MIN. TYP. MAX. 12.992 0.504 0.519 0.795 2.362 1.197 0.343 0.350 0.516 0.524 0.059 0.067 0.153 0.161 0.468 0.476 13/15 ...

Page 14

... Revision history 9 Revision history Table 9. Revision history Date 15-Sep-2004 06-Feb-2007 14/15 Revision 2 Ordering Codes Revision - pag Document reformatted, temperature ranges updated 74LCX162541 Changes ...

Page 15

... Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any time, without notice. All ST products are sold pursuant to ST’s terms and conditions of sale. ...

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