74lcx16841 Fairchild Semiconductor, 74lcx16841 Datasheet

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74lcx16841

Manufacturer Part Number
74lcx16841
Description
74lcx16841 Low Voltage 20-bit Transparent Latch With 5v Tolerant Inputs And Outputs
Manufacturer
Fairchild Semiconductor
Datasheet
1.74LCX16841.pdf (8 pages)

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© 2001 Fairchild Semiconductor Corporation
74LCX16841MEA
74LCX16841MTD
74LCX16841
Low Voltage 20-Bit Transparent Latch
with 5V Tolerant Inputs and Outputs
General Description
The LCX16841 contains twenty non-inverting latches with
3-STATE outputs and is intended for bus oriented applica-
tions. The device is byte controlled. The flip-flops appear
transparent to the data when the Latch Enable (LE) is
HIGH. When LE is LOW, the data that meets the setup time
is latched. Data appears on the bus when the Output
Enable (OE) is LOW. When OE is HIGH, the outputs are in
a high impedance state.
The LCX16841 is designed for low voltage (2.5V or 3.3V)
V
environment.
The LCX16841 is fabricated with an advanced CMOS tech-
nology to achieve high speed operation while maintaining
CMOS low power dissipation.
Ordering Code:
Devices also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.
Logic Symbol
Pin Descriptions
Order Number
CC
applications with capability of interfacing to a 5V signal
Package Number
MS56A
MTD56
OE
LE
D
O
0
0
Pin Names
–D
n
–O
n
19
19
56-Lead Shrink Small Outline Package (SSOP), JEDEC MO-118, 0.300 Wide
56-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide
DS012578
Output Enable Input (Active LOW)
Latch Enable Input
Inputs
Outputs
Features
Note 1: To ensure the high-impedance state during power up or down, OE
should be tied to V
resistor is determined by the current-sourcing capability of the driver.
Description
5V tolerant inputs and outputs
2.3V–3.6V V
5.5 ns t
Power down high impedance inputs and outputs
Supports live insertion/withdrawal (Note 1)
Implements patented noise/EMI reduction circuitry
Latch-up performance exceeds 500 mA
ESD performance:
24 mA output drive (V
Human body model
Machine model
Package Description
PD
max (V
CC
CC
through a pull-up resistor: the minimum value or the
specifications provided
CC
200V
3.3V), 20 A I
CC
2000V
3.0V)
October 1995
Revised April 2001
CC
www.fairchildsemi.com
max

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74lcx16841 Summary of contents

Page 1

... Package Number 74LCX16841MEA MS56A 56-Lead Shrink Small Outline Package (SSOP), JEDEC MO-118, 0.300 Wide 74LCX16841MTD MTD56 56-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide Devices also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code. ...

Page 2

Connection Diagram Functional Description The LCX16841 contains twenty D-type latches with 3-STATE standard outputs. The device is byte controlled with each byte functioning identically, but independent of the other. Control pins can be shorted together to obtain full 20-bit operation. ...

Page 3

Absolute Maximum Ratings Symbol Parameter V Supply Voltage Input Voltage Output Voltage Input Diode Current Output Diode Current Output Source/Sink Current Supply ...

Page 4

DC Electrical Characteristics Symbol Parameter I Quiescent Supply Current CC I Increase in I per Input CC CC Note 5: Outputs disabled or 3-STATE only. AC Electrical Characteristics Symbol Parameter t Propagation Delay PHL PLH n ...

Page 5

AC LOADING and WAVEFORMS FIGURE 1. AC Test Circuit (C t PLH t PZL t PZH Waveform for Inverting and Non-Inverting Functions Propagation Delay. Pulse Width and t rec 3-STATE Output Low Enable and Disable Times for Logic (Input Characteristics; ...

Page 6

Schematic Diagram Generic for LCX Family www.fairchildsemi.com 6 ...

Page 7

Physical Dimensions inches (millimeters) unless otherwise noted 56-Lead Shrink Small Outline Package (SSOP), JEDEC MO-118, 0.300 Wide Package Number MS56A 7 www.fairchildsemi.com ...

Page 8

Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 56-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves ...

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