74lcx540mtcx-nl Fairchild Semiconductor, 74lcx540mtcx-nl Datasheet
74lcx540mtcx-nl
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74lcx540mtcx-nl Summary of contents
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... DQFN package available in Tape and Reel only. 3. “_NL” indicates Pb-Free package (per JEDEC J-STD-020B). Device available in Tape and Reel only. ©1995 Fairchild Semiconductor Corporation 74LCX540 Rev. 1.1 General Description The LCX540 is an octal buffer/line driver designed to be employed as a memory and address driver, clock driver and bus oriented transmitter/receiver ...
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... GND O 7 (Top View) Pin Descriptions Pin Names 3-STATE Output Enable Inputs – – ©1995 Fairchild Semiconductor Corporation 74LCX540 Rev. 1.1 Logic Symbol ...
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... T Free-Air Operating Temperature Input Edge Rate Notes Absolute Maximum Rating must be observed Unused inputs or I/O’s must be held HIGH or LOW. They may not float. ©1995 Fairchild Semiconductor Corporation 74LCX540 Rev. 1.1 Conditions Output in 3-STATE (4) Output in HIGH or LOW State V GND I V GND ...
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... Skew is defined as the absolute value of the difference between the actual propagation delay for any two separate outputs of the same device. The specification applies to any outputs switching in the same direction, either HIGH-to-LOW ( LOW-to-HIGH (t OSHL ©1995 Fairchild Semiconductor Corporation 74LCX540 Rev. 1.1 Conditions ...
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... Symbol Parameter V Quiet Output Dynamic Peak V OLP V Quiet Output Dynamic Valley V OLV Capacitance Symbol Parameter C Input Capacitance IN C Output Capacitance OUT C Power Dissipation Capacitance PD ©1995 Fairchild Semiconductor Corporation 74LCX540 Rev. 1.1 Conditions C 50pF, V 3.3V 30pF, V 2.5V 50pF ...
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... OUT 3-STATE Output Low Enable and Disable Times for Logic Figure 2. Waveforms (Input Characteristics 1MHz, t Symbol ©1995 Fairchild Semiconductor Corporation 74LCX540 Rev. 1.1 (Generic for LCX Family 500 DUT C L 500 includes probe and jig capacitance) L Test ...
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... Schematic Diagram (Generic for LCX Family) Input Stage Data ESD D2 N+/P– Input Stage P3 Enable ESD D4 N+/P– N3 ©1995 Fairchild Semiconductor Corporation 74LCX540 Rev. 1 GTO™ Output D6 N+/P– N5 www.fairchildsemi.com ...
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... Tape Format for DQFN Package Designator BQX Leader (Start End) Trailer (Hub End) Tape Dimensions inches (millimeters) Reel Dimensions inches (millimeters) Tape Size A 12mm 13.0 (330.0) ©1995 Fairchild Semiconductor Corporation 74LCX540 Rev. 1.1 Tape Number Section Cavities 125 (typ) Carrier 3000 75 (typ 0.059 ...
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... Physical Dimensions inches (millimeters) unless otherwise noted Figure 3. 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide Package Number M20B ©1995 Fairchild Semiconductor Corporation 74LCX540 Rev. 1.1 9 www.fairchildsemi.com ...
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... Physical Dimensions (Continued) millimeters unless otherwise noted ©1995 Fairchild Semiconductor Corporation 74LCX540 Rev. 1.1 Figure 4. 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide Package Number M20D 10 www.fairchildsemi.com ...
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... Physical Dimensions (Continued) millimeters unless otherwise noted Figure 5. Pb-Free 20-Terminal Depopulated Quad Very-Thin Flat Pack No Leads (DQFN), JEDEC MO-241, 2.5 x 4.5mm Package Number MLP020B ©1995 Fairchild Semiconductor Corporation 74LCX540 Rev. 1.1 11 www.fairchildsemi.com ...
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... Physical Dimensions (Continued) millimeters unless otherwise noted Figure 6. 20-Lead Shrink Small Outline Package (SSOP), JEDEC MO-150, 5.3mm Wide Package Number MSA20 ©1995 Fairchild Semiconductor Corporation 74LCX540 Rev. 1.1 12 www.fairchildsemi.com ...
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... Physical Dimensions (Continued) millimeters unless otherwise noted Figure 7. 20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide Package Number MTC20 ©1995 Fairchild Semiconductor Corporation 74LCX540 Rev. 1.1 13 www.fairchildsemi.com ...
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... TRADEMARKS The following are registered and unregistered trademarks and service marks Fairchild Semiconductor owns or is authorized to use and is not intended exhaustive list of all such trademarks ® ACEx Build it Now™ CorePLUS™ CROSSVOLT™ CTL™ Current Transfer Logic™ ...