dm74als564a Fairchild Semiconductor, dm74als564a Datasheet
dm74als564a
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dm74als564a Summary of contents
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... They are particularly attractive for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers. The eight flip-flops of the DM74ALS564A are edge-trig- gered inverting D-type flip-flops. On the positive transition of the clock, the Q outputs will be set to the complement of the logic states that were set up at the D inputs. ...
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Function Table Output Clock D Control LOW State H HIGH State X Don’t Care Positive Edge Transition Z High Impedance State Q Previous Condition www.fairchildsemi.com Logic ...
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Absolute Maximum Ratings Supply Voltage Input Voltage Voltage Applied to Disabled Output Operating Free Air Temperature Range Storage Temperature Range Typical JA N Package M Package Recommended Operating Conditions Symbol Parameter V Supply Voltage CC V HIGH Level Input Voltage ...
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Switching Characteristics over recommended operating free air temperature range Symbol Parameter f Maximum Clock Frequency MAX t Propagation Delay Time PLH LOW-to-HIGH Level Output t Propagation Delay Time PHL HIGH-to-LOW Level Output t Output Enable Time PZH to HIGH Level ...
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Physical Dimensions inches (millimeters) unless otherwise noted 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide Package Number M20B 5 www.fairchildsemi.com ...
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Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right ...