dm74ls533 Fairchild Semiconductor, dm74ls533 Datasheet
dm74ls533
Manufacturer Part Number
dm74ls533
Description
Octal Transparent Latch With 3-state Outputs
Manufacturer
Fairchild Semiconductor
Datasheet
1.DM74LS533.pdf
(4 pages)
© 2000 Fairchild Semiconductor Corporation
DM74LS533WM
DM74LS533N
DM74LS533
Octal Transparent Latch with 3-STATE Outputs
General Description
The DM74LS533 consists of eight latches with 3-STATE
outputs for bus organized system applications. The flip-
flops appear transparent to the data when Latch Enable
(LE) is HIGH. When LE is LOW, the data that meets the
setup times is latched. Data appears on the bus when the
Output Enable (OE) is LOW. When OE is HIGH the bus
output is in the high impedance state. The DM74LS533 is
the same as the DM74LS373, except that the outputs are
inverted. For detailed specifications please see the
DM74LS373 data sheet, but note that the propagation
delays from data to output are 5.0 ns longer for the
DM74LS533 than for the DM74LS373.
Ordering Code:
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Logic Symbol
V
GND
Pin Descriptions
Order Number
D0, D7
LE
OE
O0–O7
CC
Pin Names
Pin 20
Pin 10
Data Inputs
Latch Enable Input (Active HIGH)
Output Enable Input (Active LOW)
Complementary 3-STATE Outputs
Package Number
M20B
N20A
Description
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide
20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
DS009811
Features
Connection Diagram
Function Table
L
H
X
Z
Q
O
Eight latches in a single package
3-STATE outputs for bus interfacing
LOW State
Don't Care
High Impedance State
HIGH State
OUTPUT
Previous Condition of O
Enable
Package Description
H
L
L
L
Enable
Latch
H
H
X
L
October 1988
Revised March 2000
D
H
L
X
X
www.fairchildsemi.com
Output
Q
O
H
L
Z
O
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Datasheet:
dm74ls533 Summary of contents
Page 1
... Data appears on the bus when the Output Enable (OE) is LOW. When OE is HIGH the bus output is in the high impedance state. The DM74LS533 is the same as the DM74LS373, except that the outputs are inverted. For detailed specifications please see the DM74LS373 data sheet, but note that the propagation delays from data to output are 5 ...
Page 2
Absolute Maximum Ratings Supply Voltage Input Voltage Operating Free Air Temperature Range Storage Temperature Range Recommended Operating Conditions Symbol Parameter V Supply Voltage CC V High Level Input Voltage IH V Low Level Input Voltage IL I High Level Output ...
Page 3
Physical Dimensions inches (millimeters) unless otherwise noted 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide Package Number M20B 3 www.fairchildsemi.com ...
Page 4
Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right ...