dm74s280 Fairchild Semiconductor, dm74s280 Datasheet
dm74s280
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dm74s280 Summary of contents
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... Although the DM74S280 is implemented without expander inputs, the corresponding function is provided by the availability of all input at pin 4, and no internal connec- tion at pin 3. This permits the DM74S280 to be substituted for the 180 in existing designs to produce an identical func- tion, even if DM74S280’s are mixed with existing 180’s. ...
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... This arrangement will provide parity in typically 25 ns. (See Figure 1.) FIGURE 1. 25-Line Parity/Generator Checker www.fairchildsemi.com Longer word lengths can be implemented by cascading DM74S280’s. As shown in Figure 2, parity can be gener- ated for word lengths bits in typically 25 ns. FIGURE 2. 81-Line Parity/Generator Checker 2 ...
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Absolute Maximum Ratings Supply Voltage Input Voltage Operating Free Air Temperature Range Storage Temperature Range Recommended Operating Conditions Symbol Parameter V Supply Voltage CC V HIGH Level Input Voltage IH V LOW Level Input Voltage IL I HIGH Level Output ...
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Physical Dimensions inches (millimeters) unless otherwise noted 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150 Narrow www.fairchildsemi.com Package Number M14A 4 ...
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Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right ...