74alvc74bq NXP Semiconductors, 74alvc74bq Datasheet - Page 8

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74alvc74bq

Manufacturer Part Number
74alvc74bq
Description
Dual D-type Flip-flop With Set And Reset; Positive-edge Trigger
Manufacturer
NXP Semiconductors
Datasheet
Philips Semiconductors
AC CHARACTERISTICS
2003 May 26
T
t
t
t
t
t
t
t
t
SYMBOL
PHL
PHL
PHL
W
W
rem
su
h
amb
Dual D-type flip-flop with set and reset;
positive-edge trigger
/t
/t
/t
PLH
PLH
PLH
= 40 to +85 C
propagation delay
nCP to nQ, nQ
propagation delay
nSD to nQ, nQ
propagation delay
nRD to nQ, nQ
clock pulse width
HIGH or LOW
set or reset pulse width LOW see Figs 7 and 8
removal time set or reset
set-up time nD to nCP
hold time nD to nCP
PARAMETER
see Figs 6 and 8
see Figs 7 and 8
see Figs 7 and 8
see Figs 6 and 8
see Figs 7 and 8
see Figs 6 and 8
see Figs 6 and 8
OTHER
TEST CONDITIONS
8
1.65 to 1.95
2.3 to 2.7
2.7
3.0 to 3.6
1.65 to 1.95
2.3 to 2.7
2.7
3.0 to 3.6
1.65 to 1.95
2.3 to 2.7
2.7
3.0 to 3.6
1.65 to 1.95
2.3 to 2.7
2.7
3.0 to 3.6
1.65 to 1.95
2.3 to 2.7
2.7
3.0 to 3.6
1.65 to 1.95
2.3 to 2.7
2.7
3.0 to 3.6
1.65 to 1.95
2.3 to 2.7
2.7
3.0 to 3.6
1.65 to 1.95
2.3 to 2.7
2.7
3.0 to 3.6
V
CC
(V)
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
2.5
2.5
2.5
2.5
2.5
2.5
2.5
2.5
0.7
0.7
0.7
0.7
1.2
1.2
0.9
0.8
0.6
0.6
0.7
0.8
MIN.
3.7
2.6
2.8
2.7
3.4
2.4
3.2
2.3
3.5
2.5
3.1
2.3
0.9
0.6
1.3
1.3
0.9
0.9
1.0
0.7
0.6
0.8
0.5
0.4
TYP.
0.2
0.1
0.1
0.1
0.4
0.3
0.4
0.1
(1)
Product specification
74ALVC74
6.2
4.2
4.2
3.8
5.4
3.8
4.2
3.5
5.4
3.8
4.3
3.5
MAX.
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
UNIT

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