74LVQ174SC Fairchild Semiconductor, 74LVQ174SC Datasheet
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74LVQ174SC
Specifications of 74LVQ174SC
Related parts for 74LVQ174SC
74LVQ174SC Summary of contents
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... LOW-to-HIGH clock transition. The device has a Master Reset to simultaneously clear all flip- flops. Ordering Code: Order Number Package Number 74LVQ174SC M16A 16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow 74LVQ174SJ M16D 16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide Devices also available in Tape and Reel. Specify by appending suffix letter “ ...
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Functional Description The LVQ174 consists of six edge-triggered D-type flip-flops with individual D inputs and Q outputs. The Clock (CP) and Master Reset (MR) are common to all flip-flops. Each D input’s state is transferred to the corresponding flip-flop’s output ...
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Absolute Maximum Ratings Supply Voltage ( Input Diode Current ( 0. 0. Input Voltage ( Output Diode Current ( ...
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AC Electrical Characteristics Symbol Parameter f Maximum Clock MAX Frequency t Propagation Delay PLH Propagation Delay PHL Propagation Delay PHL Output to OSHL t ...
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Physical Dimensions inches (millimeters) unless otherwise noted 16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow Package Number M16A 5 www.fairchildsemi.com ...
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Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the ...