24lcs22a Microchip Technology Inc., 24lcs22a Datasheet - Page 13

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24lcs22a

Manufacturer Part Number
24lcs22a
Description
2k Vesa E-edid Serial Eeprom
Manufacturer
Microchip Technology Inc.
Datasheet

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FIGURE 7-2:
FIGURE 7-3:
7.3
Sequential reads are initiated in the same way as a
random read except that after the 24LCS22A transmits
the first data byte, the master issues an acknowledge
as opposed to a Stop condition in a random read. This
directs the 24LCS22A to transmit the next sequentially
addressed 8-bit word (Figure 7-3).
To provide sequential reads the 24LCS22A contains an
internal Address Pointer which is incremented by one
at the completion of each operation. This Address
Pointer allows the entire memory contents to be serially
read during one operation.
© 2005 Microchip Technology Inc.
Master
SDA Line
Bus Activity
Bus Activity
Sequential Read
SDA Line
Bus Activity
Master
Bus Activity
Control
Byte
A
C
K
RANDOM READ
SEQUENTIAL READ
S
T
A
R
T
S
1 0 1 0 0 0 0 0
Data n
Control
Byte
C
A
K
A
C
K
Data n+1
Address
Word
A
C
K
7.4
The 24LCS22A employs a V
circuit which disables the internal erase/write logic if the
V
The SDA, SCL and VCLK inputs have Schmitt Trigger
and filter circuits which suppress noise spikes to assure
proper device operation even on a noisy bus.
CC
A
C
K
S
T
A
R
T
S
is below 1.5 volts at nominal conditions.
Data n+2
1
0
Noise Protection
1
Control
Byte
0
0
0
A
C
K
0
1
A
C
K
24LCS22A
CC
Data n
threshold detector
Data n+X
DS21682C-page 13
O
N
A
C
K
S
T
O
P
P
N
O
C
A
K
S
T
O
P
P

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