is42s32160c Integrated Silicon Solution, Inc., is42s32160c Datasheet - Page 12

• Manufacturer Part Number: is42s32160c
• Description: 16mx32 512mb Synchronous Dram
• Manufacturer: Integrated Silicon Solution, Inc.

IS42S32160C
10
B
5
CLK
COMMAND
DQ0 - DQ3
A write burst without the AutoPrecharge function may be interrupted by a subsequent Write, BankPrecharge/
PrechargeAll,or Read command before the end of the burst length. An interrupt coming from Write command can
occur on any clock cycle following the previous Write command (refer to the Figure "Write Interrupted by a Write").
CLK
ADDRESS
COMMAND
CAS# latency=2
t CK2 , DQ's
CAS# latency=3
t CK3 , DQ's
Write command
(RAS#=”H”, CAS#=”L”, WE#=”L”, BS =Bank, A10 =”L”, A0-A8 =Column Address)
The Write command is used to write a burst of data on consecutive clock cycles from an active row in an active
bank.The bank must be active for at least tRCD(min.) before the Write command is issued.During write bursts,
the first valid data-in element will be registered coincident with the Write command. Subsequent data elements
will be registered on each successive positive clock edge (refer to Figure "Burst Write Operation").The DQs remain
with high-impedance at the end of the burst unless another command is initiated.The burst length and burst
sequence are determined by the mode register,which is already programmed. A full-page burst will continue until
terminated (at the end of the page it will wrap to column 0 and continue).
Burst Write Operation (Burst Length =4,CAS# Latency =2,3)
The first data element and the write
are registered on the same clock edge.
READ A
Col A
Bank,
T0
T0
NOP
WRITEA
DIN A 0
Read to Precharge (CAS#Latency =2,3)
T1
T1
NOP
I
DOUT A 0
DIN A 1
T2
T2
NOP
NOP
DOUT A 0
DIN A 2
T3
T3
NOP
DOUT A 1
NOP
Bank(s )
Precharge
DOUT A 2
DIN A 3
T4
T4
NOP
DOUT A 1
Extra data is masked.
don’t care
DOUT A 2
T5
T5
DOUT A 3
NOP
NOP
t
RP
Integrated Silicon Solution, Inc.
T6
T6
DOUT A 3
NOP
NOP
Activate
T7
Bank,
Row
T7
NOP
I
T8
T8
NOP
NOP
Rev. B
01/22/09
®