is43r16160 Integrated Silicon Solution, Inc., is43r16160 Datasheet - Page 27

• Manufacturer Part Number: is43r16160
• Description: 32mx8, 16mx16 256mb Synchronous Dram
• Manufacturer: Integrated Silicon Solution, Inc.

DDR SDRAM (Rev.1.1)
BURST INTERRUPTION
IS43R16160
Integrated Silicon Solution, Inc.
Rev. 00A
09/10/08
[Read Interrupted by Read]
minimum 1 CLK. A PRE command to output disable latency is equivalent to the /CAS Latency.
As a result, READ to PRE interval determines valid data length to be output. The figure below
shows examples of BL=8.
READ to READ interval is minimum 1CLK.
[Read Interrupted by precharge]
Burst read operation can be interrupted by precharge of the same bank. READ to PRE interval is
Burst read operation can be interrupted by new read of any bank. Random column access is allowed.
CL=2.0
A0-9,11,12
Command
BA0,1
/CLK
DQS
CLK
A10
DQ
Command
Command
Command
READ READ
Preliminary
/CLK
Preliminary
DQS
DQS
DQS
CLK
00
Yi
DQ
DQ
DQ
0
00
Yj
0
Read Interrupted by Precharge (BL=8)
READ PRE
READ
Read Interrupted by Read (BL=8, CL=2)
READ
Qai0 Qai1 Qaj0 Qaj1 Qaj2 Qaj3 Qak0 Qak1 Qak2 Qak3 Qak4 Qak5 Qal0 Qal1 Qal2 Qal3 Qal4 Qal5 Qal6 Qal7
READ
10
Yk
0
PRE
Q0
Q0
Q0
256M Double Data Rate Synchronous DRAM
Q1
Q1
Q1
PRE
Q2
Q2
READ
Q3
Q3
01
Yl
0
Q4
Q5
A3S56D30/40ETP
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