is43lr16800f-6bl Integrated Silicon Solution, Inc., is43lr16800f-6bl Datasheet - Page 12

• Manufacturer Part Number: is43lr16800f-6bl
• Description: 2m X 16bits X 4banks Mobile Ddr Sdram
• Manufacturer: Integrated Silicon Solution, Inc.

Rev. 00A | Dec. 2010
Extended Mode Register
The Extended Mode Register controls the functions beyond those controlled by the Mode Register. These additional functions are special
features of the Mobile DDR SDRAM. They include Partial Array Self Refresh (PASR) and Driver Strength (DS).
The Extended Mode Register is programmed via the Mode Register Set command (BA0=0, BA1=1) and retains the stored information until
programmed again, the device goes into deep power-down mode, or the device loses power.
The Extended Mode Register must be programmed with A7 through A11 set to “0”. The Extended Mode Register must be loaded when all
banks are idle and no bursts are in progress, and the controller must wait the specified time before initiating any subsequent operation.
Violating either of these requirements results in unspecified operation.
Partial Array Self Refresh
refreshed during SELF REFRESH. The refresh options are as follows:
Data in banks that are disabled will be lost.
Output Driver Strength
strength of the output buffers is available. Drive strength should be selected based on the expected loading of the memory bus. Bits A5 and
A6 of the extended mode register can be used to select the driver strength of the DQ outputs. There are four allowable settings for the
output drivers.
Temperature Compensated Self Refresh
Temperature Compensated Self Refresh allows the controller to program the Refresh interval during SELF REFRESH mode, according to the
case temperature of the Mobile SDRAM device. This allows great power savings during SELF REFRESH during most operating temperature
ranges. Only during extreme temperatures would the controller have to select a TCSR level that will guarantee data during SELF REFRESH.
At higher temperatures a capacitor loses charge quicker than at lower temperatures, requiring the cells to be refreshed more often.
Historically, during Self Refresh, the refresh rate has been set to accommodate the worst case, or highest temperature range expected.
accommodate the higher temperatures.
This temperature compensated refresh rate will save power when the DRAM is operating at normal temperatures.
For further power savings during SELF REFRESH, the PASR feature allows the controller to select the amount of memory that will be
WRITE and READ commands can still occur during standard operation, but only the selected banks will be refreshed during SELF REFRESH.
Because the Mobile DDR SDRAM is designed for use in smaller systems that are mostly point to point, an option to control the drive
In the Mobile DDR SDRAM, a temperature sensor is implemented for automatic control of the self refresh oscillator on the device.
Every cell in the DRAM requires refreshing due to the capacitor losing its charge over time. The refresh rate is dependent on temperature.
Thus, during ambient temperatures, the power consumed during refresh was unnecessarily high, because the refresh rate was set to
• Full array: banks 0, 1, 2, and 3
• Half array: banks 0 and 1
• Quarter array: bank 0
• One eight array: half of bank 0
• One sixteen array: quarter of bank 0
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