m24c64-df STMicroelectronics, m24c64-df Datasheet - Page 31

• Manufacturer Part Number: m24c64-df
• Description: 64 Kbit Serial I?c Bus Eeprom
• Manufacturer: STMicroelectronics

M24C64-DF, M24C64-W, M24C64-R, M24C64-F
Table 17.
1. Only M24C64 and M24C64-D devices identified by the process letter K are qualified at 1 MHz.
2. Test conditions (in addition to those in
3. There is no min. or max. values for the input signal rise and fall times. It is however recommended by the
4. With C
5. To avoid spurious Start and Stop conditions, a minimum delay is placed between SCL=1 and the falling or
6. t
7. Characterized only, not tested in production.
t
t
CLQV
QL1QL2
Symbol
t
t
XH1XH2
XL1XL2
t
t
t
t
t
t
t
t
t
t
DXCX
CHDH
I²C specification that the input signal rise and fall times be more than 20 ns and less than 300 ns when
f
rising edge of SDA.
0.7 V
CHCL
CLCH
CLDX
CLQX
CHDL
DHDL
NS
DLCL
C
CLQV
t
f
W
C
< 400 kHz, or less than 120 ns when f
(7)
(5)(6)
CC
(7)
is the time (from the falling edge of SCL) required by the SDA bus line to reach either 0.3 V
L
, assuming that the Rbus × Cbus time constant is within the values specified in
= 10 pF
t
t
t
t
t
SU:STO
SU:DAT
HD:DAT
SU:STA
HD:STA
t
1 MHz AC characteristics
t
f
t
HIGH
Alt.
t
LOW
t
t
SCL
BUF
WR
DH
t
t
t
AA
R
F
F
Clock frequency
Clock pulse width high
Clock pulse width low
Input signal rise time
Input signal fall time
SDA (out) fall time
Data in setup time
Data in hold time
Data out hold time
Clock low to next data valid (access time)
Start condition setup time
Start condition hold time
Stop condition setup time
Time between Stop condition and next Start
condition
Write time
Pulse width ignored (input filter on SCL and
SDA)
Doc ID 16891 Rev 23
Table
Parameter
C
< 1 MHz.
7,
(1)
Table 8
(2)
and
Table
10).
Min.
20
260
400
100
250
250
250
500
50
(3)
(3)
0
0
DC and AC parameters
-
-
(4)
Figure
Max.
450
120
80
(3)
(3)
1
5
-
-
-
-
-
-
-
-
-
6.
CC
or
MHz
Unit
ms
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
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