m95256 STMicroelectronics, m95256 Datasheet - Page 11

• Manufacturer Part Number: m95256
• Description: 256 Kbit Serial Spi Bus Eeprom With High Speed Clock
• Manufacturer: STMicroelectronics

M95256, M95256-W, M95256-R
3.8.4
4
4.1
When V
Power-down
At power-down (continuous decrease in V
operating voltage to below the power on reset threshold voltage, the device stops
responding to any instruction sent to it. During power-down, the device must be deselected
(the Chip Select (S) should be allowed to follow the voltage applied on V
Power mode (that is, there should be no internal Write cycle in progress).
Operating features
Hold condition
The Hold (HOLD) signal is used to pause any serial communications with the device without
resetting the clocking sequence.
During the Hold condition, the Serial Data Output (Q) is high impedance, and Serial Data
Input (D) and Serial Clock (C) are Don’t Care.
To enter the Hold condition, the device must be selected, with Chip Select (S) low.
Normally, the device is kept selected, for the whole duration of the Hold condition.
Deselecting the device while it is in the Hold condition, has the effect of resetting the state of
the device, and this mechanism can be used if it is required to reset any processes that had
been in progress.
The Hold condition starts when the Hold (HOLD) signal is driven low at the same time as
Serial Clock (C) already being low (as shown in
The Hold condition ends when the Hold (HOLD) signal is driven high at the same time as
Serial Clock (C) already being low.
Figure 4
with Serial Clock (C) being low.
Standby Power mode
deselected (at next power-up, a falling edge is required on Chip Select (S) before any
instruction can be started).
not in the Hold condition
Status register:
–
–
–
CC
also shows what happens if the rising and falling edges are not timed to coincide
the Write Enable Latch (WEL) is reset to 0
the Write In Progress (WIP) is reset to 0
the SRWD, BP1 and BP0 bits of the Status Register are unchanged from the
previous power-down (they are non-volatile bits)
passes over the POR threshold, the device is reset and is in the following state:
CC
), as soon as V
Figure
4).
CC
drops from the normal
Operating features
CC
) and in Standby
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