m24m01-r STMicroelectronics, m24m01-r Datasheet - Page 6

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m24m01-r

Manufacturer Part Number
m24m01-r
Description
1 Mbit Serial I?c Bus Eeprom
Manufacturer
STMicroelectronics
Datasheet

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Description
1
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Description
The M24M01-R is an I
(EEPROM) device organized as 128 Kb × 8 bits.
The I
line. The devices carry a built-in 4-bit device type identifier code (1010) in accordance with
the I
The M24M01-R behaves as a slave in the I
synchronized by the serial clock. Read and Write operations are generated by the bus
master and initiated by a Start condition, followed by the device select code, address bytes
and data bytes. Data transfers are terminated by a Stop condition after an Ack for Write, and
after a NoAck for Read.
When writing data to the memory, the device inserts an acknowledge bit during the 9
time, following the bus master’s 8-bit transmission. When data is read by the bus master, the
bus master acknowledges the receipt of the data byte in the same way.
In order to meet environmental requirements, ST offers the M24M01-R in ECOPACK®
packages. ECOPACK® packages are Lead-free and RoHS compliant.
ECOPACK is an ST trademark. ECOPACK specifications are available at: www.st.com.
Figure 1.
Table 1.
E1, E2
SDA
SCL
WC
V
V
CC
SS
2
2
C bus definition.
C bus is a two-wire serial interface, comprising a bidirectional data line and a clock
Signal name
Logic diagram
Signal names
2
C-compatible electrically erasable programmable memory
E1-E2
SCL
WC
Chip Enable
Serial Data
Serial Clock
Write Control
Supply voltage
Ground
2
V CC
M24M01-R
V SS
Function
2
C protocol, with all memory operations
SDA
AI13415b
Input
Input
I/O
Input
Direction
M24M01-R
th
bit

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