cy62167ev30 Cypress Semiconductor Corporation., cy62167ev30 Datasheet

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cy62167ev30

Manufacturer Part Number
cy62167ev30
Description
16-mbit 1m X 16 / 2m X 8 Static Ram
Manufacturer
Cypress Semiconductor Corporation.
Datasheet

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0
Features
Functional Description
The CY62167EV30 is a high performance CMOS static RAM
organized as 1M words by 16 bits/2M words by 8 bits. This
device features an advanced circuit design designed to provide
an ultra low active current. Ultra low active current is ideal for
providing More Battery Life™ (MoBL
Logic Block Diagram
Cypress Semiconductor Corporation
Document #: 38-05446 Rev. *D
TSOP I package configurable as 1M x 16 or as 2M x 8 SRAM
Very high speed: 45 ns
Wide voltage range: 2.20V–3.60V
Ultra low standby power
Ultra low active power
Easy memory expansion with CE
Automatic power down when deselected
CMOS for optimum speed/power
Offered in Pb-free 48-Ball VFBGA and 48-Pin TSOP I packages
Typical standby current: 1.5 µA
Maximum standby current: 12 µA
Typical active current: 2.2 mA @ f = 1 MHz
Power Down
Circuit
A
A
A
A
A
A
A
A
A
A
A
1
10
9
8
7
6
5
4
3
2
1
0
, CE
®
) in portable applications
2
, and OE features
CE
CE
BHE
BLE
2
1
198 Champion Court
COLUMN DECODER
DATA IN DRIVERS
1M × 16 / 2M x 8
RAM Array
16-Mbit (1M x 16 / 2M x 8) Static RAM
such as cellular telephones. The device also has an automatic
power down feature that reduces power consumption by 99%
when addresses are not toggling. Place the device into standby
mode when deselected (CE
BLE are HIGH). The input and output pins (IO
placed in a high impedance state when: the device is deselected
(CE
Byte High Enable and Byte Low Enable are disabled (BHE, BLE
HIGH), or a write operation is in progress (CE
and WE LOW).
To write to the device, take Chip Enables (CE
HIGH) and Write Enable (WE) input LOW. If Byte Low Enable
(BLE) is LOW, then data from IO pins (IO
into the location specified on the address pins (A
If Byte High Enable (BHE) is LOW, then data from the IO pins
(IO
address pins (A
To read from the device, take Chip Enables (CE
HIGH) and Output Enable (OE) LOW while forcing the Write
Enable (WE) HIGH. If Byte Low Enable (BLE) is LOW, then data
from the memory location specified by the address pins appears
on IO
memory appears on IO
for a complete description of read and write modes.
For best practice recommendations, refer to the Cypress
application note
8
1
through IO
HIGH or CE
0
to IO
San Jose
7
. If Byte High Enable (BHE) is LOW, then data from
0
15
AN1064, SRAM System
2
through A
) is written into the location specified on the
LOW), outputs are disabled (OE HIGH), both
,
8
CA 95134-1709
to IO
CY62167EV30 MoBL
1
19
HIGH or CE
).
15
. See the
IO
IO
Revised September 14, 2007
OE
BLE
BYTE
BHE
WE
0
8
–IO
–IO
0
2
“Truth Table” on page 9
7
15
Guidelines.
LOW or both BHE and
through IO
0
1
through IO
LOW, CE
1
1
0
LOW and CE
LOW and CE
408-943-2600
through A
CE
CE
7
2
1
) is written
2
15
HIGH
) are
®
19
).
2
2
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cy62167ev30 Summary of contents

Page 1

... Offered in Pb-free 48-Ball VFBGA and 48-Pin TSOP I packages ■ Functional Description The CY62167EV30 is a high performance CMOS static RAM organized as 1M words by 16 bits/2M words by 8 bits. This device features an advanced circuit design designed to provide an ultra low active current. Ultra low active current is ideal for ® ...

Page 2

... Figure 2. 48-Pin TSOP I Top View Speed Operating I (ns MHz [5] [5] Max Typ Max 3.60 45 2.2 4.0 to use the device SRAM. The 48-TSOPI package can also be used SRAM CY62167EV30 MoBL [ A16 47 BYTE 46 Vss 45 IO15/A20 ...

Page 3

... 3.60V CC Test Conditions T = 25° MHz CC(typ) (min) and 200 µs wait time after CY62167EV30 MoBL ...........–0.3V to 3.9V (V (max) + 0.3V CC Ambient [8] Range V CC Temperature Industrial –40°C to +85°C 2. Unit [5] Min Typ Max 2.0 2 ...

Page 4

... V < 0. DATA RETENTION MODE V (min) > 1 CDR (min) > 100 µs or stable at V (min) > 100 µ CY62167EV30 MoBL VFBGA TSOP 1mm) °C °C/W 16 4.3 90% 90% 10% Fall Time = 1 V/ns V Unit Ω Ω Ω V [5] ...

Page 5

... HIGH to Write End /I as shown in “AC Test Loads and Waveforms” on page less than less than less than t LZCE HZBE LZBE HZOE = V , BHE or BLE or both = CY62167EV30 MoBL 45 ns Unit Min Max ...

Page 6

... Figure 3. Read Cycle No OHA [20, 21] Figure 4. Read Cycle No DBE t DOE DATA VALID 50% , BHE, BLE or both = V , and transition HIGH. 2 ® CY62167EV30 MoBL DATA VALID HZCE t HZBE t HZOE HIGH IMPEDANCE Page [+] Feedback ...

Page 7

... During this period the IOs are in output state. Do not apply input signals. Document #: 38-05446 Rev. *D [18, 22, 23] Figure 5. Write Cycle No SCE PWE VALID DATA , the output remains in a high impedance state. IH ® CY62167EV30 MoBL Page [+] Feedback ...

Page 8

... Document #: 38-05446 Rev. *D [18, 22, 23] Figure 6. Write Cycle No SCE PWE VALID DATA [23] Figure 7. Write Cycle No SCE PWE t SD VALID DATA t HZWE ® CY62167EV30 MoBL LZWE Page [+] Feedback ...

Page 9

... Output Disabled Data In (IO – Data In (IO – High Z (IO – High Z (IO – Data In (IO – CY62167EV30 MoBL Mode Power Standby ( Standby ( Standby ( Read Active ( Read Active ( Read Active (I ...

Page 10

... Document #: 38-05446 Rev. *D Package Package Type Diagram 001-13297 48-ball VFBGA ( mm) (Pb-free) 51-85150 48-ball VFBGA ( mm) 51-85150 48-ball VFBGA ( mm) (Pb-free) 51-85183 48-pin TSOP I (Pb-free) ® CY62167EV30 MoBL Operating Range Industrial 001-13297-*A Page [+] Feedback ...

Page 11

... Figure 10. 48-Ball VFBGA ( mm), 51-85150 TOP VIEW A1 CORNER 6.00±0.10 SEATING PLANE C Document #: 38-05446 Rev. *D CY62167EV30 MoBL BOTTOM VIEW A1 CORNER Ø0. Ø0. Ø0.30±0.05(48X 1.875 A 0.75 3 ...

Page 12

... Figure 11. 48-Pin TSOP 1.0 mm), 51-85183 DIMENSIONS IN INCHES[MM] MIN. MAX. JEDEC # MO-142 1 0.004[0.10] 0.008[0.21] 0°-5° Document #: 38-05446 Rev 0.472[12.00] 0.724 [18.40] 0.047[1.20] MAX. 0.787[20.00] 0.010[0.25] GAUGE PLANE 0.020[0.50] 0.028[0.70] ® CY62167EV30 MoBL 0.037[0.95] 0.041[1.05] 0.020[0.50] TYP. 0.007[0.17] 0.011[0.27] 0.002[0.05] 0.006[0.15] 51-85183-*A Page [+] Feedback ...

Page 13

... Document History Page Document Title: CY62167EV30 MoBL Document Number: 38-05446 REV. ECN NO. Issue Date ** 202600 01/23/04 *A 463674 See ECN *B 469169 See ECN *C 1130323 See ECN *D 1323984 See ECN VKN/AESA Modified I © Cypress Semiconductor Corporation, 2004-2007. The information contained herein is subject to change without notice. Cypress Semiconductor Corporation assumes no responsibility for the use of any circuitry other than circuitry embodied in a Cypress product ...

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