w942508bh Winbond Electronics Corp America, w942508bh Datasheet - Page 9

• Manufacturer Part Number: w942508bh
• Manufacturer: Winbond Electronics Corp America

11. DC CHARACTERISTICS
I
I
SYM.
I
I
I
I
I
I
DD4W
I
I
DD2N
DD2Q
DD3N
DD4R
I
I
I
DD2P
DD2F
DD3P
DD0
DD1
DD5
DD6
DD7
COMMAND
ADDRESS
OPERATING CURRENT: One Bank Active-Precharge; t
t
and control inputs changing once per clock cycle
OPERATING CURRENT: One Bank Active-Read-Precharge; Burst = 2;
t
inputs changing once per clock cycle.
PRECHARGE-POWER-DOWN STANDBY CURRENT: All Banks Idle;
Power down mode; CKE < V
and DM
IDLE FLOATING STANDBY CURRENT: CS > V
CKE > V
cycle; Vin = Vref for DQ, DQS and DM
IDLE STANDBY CURRENT: CS > V
min; t
clock cycle; Vin > V
IDLE QUIET STANDBY CURRENT: CS > V
V
for DQ, DQS and DM
ACTIVE POWER-DOWN STANDBY CURRENT: One Bank Active; Power
down mode; CKE < V
ACTIVE STANDBY CURRENT: CS > V
Active-Precharge; t
changing twice per clock cycle; Address and other control inputs changing
once per clock cycle
OPERATING CURRENT: Burst = 2; Reads; Continuous burst; One Bank
Active; Address and control inputs changing once per clock cycle; CL=2.5;
t
OPERATING CURRENT: Burst = 2; Write; Continuous burst; One Bank
Active; Address and control inputs changing once per clock cycle; CL =
2.5; t
AUTO REFRESH CURRENT: t
SELF REFRESH CURRENT: CKE < 0.2V
RANDOM READ CURRENT: 4 Banks Active Read with activate every
20ns, Auto-Precharge Read every 20 nS; Burst = 4; t
DQ, DM and DQS inputs changing twice per clock cycle; Address
changing once per clock cycle
DQS
DQ
CK
RC
CK
CK
CK
IH
min; DQ, DM and DQS inputs changing twice per clock cycle; Address
= t
= t
min; t
CK
Bank 0
Bank 0
Row d
Row d
CK
ACT
RC
CK
= t
= t
IH
min; I
min; CL = 2.5; t
CK
t
Qa
CK = 10ns
CK
min; Address and other control inputs changing once per clock
CK
= t
min; DQ, DM and DQS inputs changing twice per clock cycle
min; Address and other control inputs changing once per
OUT
CK
Qa
Bank 3
Bank 3
READ
READ
Row c
Col c
min; Address and other control inputs stable; Vin > V
AP
AP
= 0mA
RC
IH
Qb
IL
min or Vin < V
= t
t
max; t
RCD
CK
RAS
Qb
= t
IL
Bank 1
Bank 1
Row e
Row e
max; t
ACT
ACT
PARAMETER
CK
CK
max; t
RC
= t
Qb
min; I
= t
CK
CK
RANDOM READ CURRENT Timing
IL
CK
RFC
= t
max for DQ, DQS and DM
min
IH
Qb
OUT
= t
Bank 0
Bank 0
READ
READ
Row d
CK
min; All Banks Idle; CKE > V
Col d
min
IH
AP
AP
CK
= 0 mA; Address and control
min; DQ, DM and DQS inputs
min; CKE > V
Qc
min; Vin = V
IH
min; All Banks Idle; CKE >
- 9 -
IH
Qc
Bank 2
Bank 2
Row f
Row f
min; All Banks Idle;
RCD
ACT
ACT
t
RC
RC
Qc
= 3; I
IH
REF
= t
min; One Bank
RC
for DQ, DQS
OUT
Qc
Bank 1
Bank 1
READ
Row e
Col e
min; t
AP
Publication Release Date: March 19, 2002
= 0mA;
Qd
IH
(
CK
I
REF
DD7)
=
Qd
Bank 3
Bank 3
Row q
Row q
ACT
ACT
110
110
165
165
190
270
45
45
40
20
70
-7
2
3
Qd
MAX.
Qd
110
110
155
155
190
270
W942508BH
-75
40
40
35
20
65
Bank 2
Bank 2
2
3
READ
Col f
Col f
AP
Qe
UNIT
mA
Qe
Bank 0
Bank 0
Row h
Row h
ACT
ACT
Revision A1
NOTES
7, 9
7, 9
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7