cy14b104n-zsp45xit Cypress Semiconductor Corporation., cy14b104n-zsp45xit Datasheet

no-image

cy14b104n-zsp45xit

Manufacturer Part Number
cy14b104n-zsp45xit
Description
4-mbit 512k X 8/256k X 16 Nvsram
Manufacturer
Cypress Semiconductor Corporation.
Datasheet
Features
Note
Cypress Semiconductor Corporation
Document #: 001-07102 Rev. *G
1. Address A
Logic Block Diagram
15 ns, 25 ns, and 45 ns access times
Internally organized as 512K x 8 (CY14B104L) or 256K x 16
(CY14B104N)
Hands off automatic STORE on power down with only a small
capacitor
STORE to QuantumTrap
software, device pin, or AutoStore
RECALL to SRAM initiated by software or power up
Infinite read, write, and recall cycles
8 mA typical I
200,000 STORE cycles to QuantumTrap
20 year data retention
Single 3V +20%, –10% operation
Commercial and industrial temperatures
48-pin FBGA and 44/54-pin TSOP - II packages
Pb-free and RoHS compliance
0
- A
18
CC
and Data DQ0 - DQ7 for x8 configuration, Address A
at 200 ns cycle time
Address
®
nonvolatile elements initiated by
A
®
0
on power down
- A
BHE
BLE
OE
WE
CE
18
[1]
PRELIMINARY
198 Champion Court
V
4-Mbit (512K x 8/256K x 16) nvSRAM
CC
V
CY14B104L
CY14B104N
0
SS
- A
17
V
and Data DQ0 - DQ15 for x16 configuration.
CAP
Functional Description
The Cypress CY14B104L/CY14B104N is a fast static RAM, with
a nonvolatile element in each memory cell. The memory is
organized as 512K words of 8 bits each or 256K words of 16 bits
each.
QuantumTrap technology, producing the world’s most reliable
nonvolatile memory. The SRAM provides infinite read and write
cycles, while independent nonvolatile data resides in the highly
reliable QuantumTrap cell. Data transfers from the SRAM to the
nonvolatile elements (the STORE operation) takes place
automatically at power down. On power up, data is restored to
the SRAM (the RECALL operation) from the nonvolatile memory.
Both the STORE and RECALL operations are also available
under software control.
The
San Jose
embedded
,
CY14B104L, CY14B104N
DQ0 - DQ7
CA 95134-1709
HSB
nonvolatile
[1]
Revised March 18, 2008
elements
408-943-2600
incorporate
[+] Feedback
[+] Feedback

Related parts for cy14b104n-zsp45xit

cy14b104n-zsp45xit Summary of contents

Page 1

... Cypress Semiconductor Corporation Document #: 001-07102 Rev. *G PRELIMINARY 4-Mbit (512K x 8/256K x 16) nvSRAM Functional Description The Cypress CY14B104L/CY14B104N is a fast static RAM, with a nonvolatile element in each memory cell. The memory is organized as 512K words of 8 bits each or 256K words of 16 bits each. The QuantumTrap technology, producing the world’ ...

Page 2

... DQ10 WE 30 DQ9 A DQ8 CAP CY14B104L, CY14B104N 48-FBGA (x8) Top View (not to scale DQ4 ...

Page 3

... DQ11 15 39 DQ5 DQ10 16 38 DQ6 DQ9 17 37 DQ7 DQ8 CAP Description CY14B104L, CY14B104N [2] Page [+] Feedback [+] Feedback ...

Page 4

... Device Operation The CY14B104L/CY14B104N nvSRAM is made up of two functional components paired in the same physical cell. They are an SRAM memory cell and a nonvolatile QuantumTrap cell. The SRAM memory cell operates as a standard fast static RAM. Data in the SRAM is transferred to the nonvolatile cell (the STORE operation), or from the nonvolatile cell to the SRAM (the RECALL operation) ...

Page 5

... The six consecutive address locations must be in the order listed. WE must be HIGH during all six cycles to enable a nonvolatile cycle. 5. While there are 19 address lines on the CY14B104L/CY14B104N, only the lower 16 lines are used to control software modes state depends on the state of OE, BHE and BLE. The IO table shown assumes OE, BHE, and BLE LOW. ...

Page 6

... AutoStore state through subsequent power down cycles. The part comes from the factory with AutoStore enabled. Data Protection The CY14B104L/CY14B104N protects data from corruption during low voltage conditions by inhibiting all externally initiated STORE and write operations. The low voltage condition is ...

Page 7

... Max, V < V < Max, V < V < > – pin and Rated CAP SS CY14B104L, CY14B104N [7] .................................... 15 mA Ambient Temperature V CC 0°C to +70°C 2.7V to 3.6V –40°C to +85°C 2.7V to 3.6V Min Max Commercial Industrial – ...

Page 8

... EIA/JESD51. Thermal Resistance JC (Junction to Case) 577Ω 3.0V R1 OUTPUT 30 pF Note 10. These parameters are guaranteed but not tested. Document #: 001-07102 Rev. *G PRELIMINARY CY14B104L, CY14B104N [10] Test Conditions T = 25° MHz 3.0V CC [10] Test Conditions 48-FBGA 44-TSOP II 54-TSOP II TBD TBD Figure 5 ...

Page 9

... Document #: 001-07102 Rev. *G PRELIMINARY 15 ns Description Min Max CY14B104L, CY14B104N Unit Min Max Min Max ...

Page 10

... Description OHA DATA VALID SWITCH. Table 1 on page 5. WE must be HIGH during all six consecutive cycles. to allow read/write cycles to complete. DELAY CY14B104L, CY14B104N CY14B104L/CY14B104N Unit Min Max 2.65 V μs 150 [17, 18] 25ns 45ns Unit Min Max ...

Page 11

... ADDRESS BHE , BLE DATA IN DATA OUT PREVIOUS DATA Notes 23 must be >V during address transitions. IH 24. BHE and BLE are applicable for x16 configuration only. Document #: 001-07102 Rev. *G PRELIMINARY CY14B104L, CY14B104N ACE t LZCE t DOE t LZOE t DBE t LZBE t ACTIVE ...

Page 12

... SCE PWE DATA VALID HIGH IMPEDANCE Figure 10. AutoStore or Power Up RECALL t STORE t HRECALL SWITCH. CY14B104L, CY14B104N [14, 22, 23, 24 [25] STORE occurs only No STORE occurs without atleast one if a SRAM write has happened SRAM write t STORE Page [+] Feedback ...

Page 13

... DQ (DATA) DATA VALID Document #: 001-07102 Rev. *G PRELIMINARY ADDRESS # 6 ADDRESS # 6 t GHAX DATA VALID t RC ADDRESS # 6 t GHAX DATA VALID CY14B104L, CY14B104N [18 STORE RECALL STORE RECALL HIGH IMPEDANCE HIGH IMPEDANCE DATA VALID [18 STORE RECALL HIGH IMPEDANCE Page ...

Page 14

... Switching Waveforms (continued) Document #: 001-07102 Rev. *G PRELIMINARY [21] Figure 13. Hardware STORE Cycle [19, 20] Figure 14. Soft Sequence Processing t SS CY14B104L, CY14B104N t SS Page [+] Feedback [+] Feedback ...

Page 15

... TSOP II 51-85087 44-pin TSOP II 51-85128 48-ball FBGA 51-85128 48-ball FBGA 51-85128 48-ball FBGA 51-85160 54-pin TSOP II 51-85160 54-pin TSOP II 51-85160 54-pin TSOP II CY14B104L, CY14B104N Operating Range Commercial Industrial Commercial Industrial Commercial Industrial Commercial Industrial Commercial Industrial Commercial Industrial Commercial ...

Page 16

... CY14B104L-ZSP45XIT CY14B104L-ZSP45XI CY14B104N-ZS45XCT CY14B104N-ZS45XIT CY14B104N-ZS45XI CY14B104N-BA45XCT CY14B104N-BA45XIT CY14B104N-BA45XI CY14B104N-ZSP45XCT CY14B104N-ZSP45XIT CY14B104N-ZSP45XI All parts are Pb-free. The above table contains Preliminary information. Please contact your local Cypress sales representative for availability of these parts. Document #: 001-07102 Rev. *G PRELIMINARY Package Package Type Diagram 51-85087 ...

Page 17

... 104 Pb-Free Pin Blank - 44 Pin NVSRAM 14 - Auto Store + Software Store + Hardware Store Cypress Document #: 001-07102 Rev. *G PRELIMINARY CY14B104L, CY14B104N Option Tape & Reel Blank - Std. Temperature Commercial (0 to 70° Industrial (–40 to 85°C) Package FBGA ...

Page 18

... Document #: 001-07102 Rev. *G PRELIMINARY Figure 15. 44-Pin TSOP II (51-85087) PIN 1 I. BASE PLANE 0°-5° 0.10 (.004) 0.597 (0.0235) 0.406 (0.0160) SEATING PLANE CY14B104L, CY14B104N DIMENSION IN MM (INCH) MAX MIN EJECTOR PIN BOTTOM VIEW 10.262 (0.404) 10 ...

Page 19

... Figure 16. 48-ball FBGA - 1.2 mm (51-85128) TOP VIEW A1 CORNER 6.00±0.10 SEATING PLANE C Document #: 001-07102 Rev. *G PRELIMINARY CY14B104L, CY14B104N A BOTTOM VIEW A1 CORNER Ø0. Ø0. Ø0.30±0.05(48X 1.875 0.75 3.75 B 6.00± ...

Page 20

... Package Diagrams (continued) Document #: 001-07102 Rev. *G PRELIMINARY Figure 17. 54-Pin TSOP II (51-85160) CY14B104L, CY14B104N 51-85160-** Page [+] Feedback [+] Feedback ...

Page 21

... Document History Page Document Title: CY14B104L/CY14B104N 4-Mbit (512K x 8/256K x 16) nvSRAM Document Number: 001-07102 Issue Orig. of REV. ECN NO. Date Change ** 431039 See ECN TUP *A 489096 See ECN TUP *B 499597 See ECN PCI *C 517793 See ECN TUP *D 774001 See ECN UHA Document #: 001-07102 Rev. *G ...

Page 22

... Document Title: CY14B104L/CY14B104N 4-Mbit (512K x 8/256K x 16) nvSRAM Document Number: 001-07102 Issue Orig. of REV. ECN NO. Date Change *E 914220 See ECN UHA *F 1889928 See ECN vsutmp8/AE 2267286 See ECN GVCH/PYRS Added BHE and BLE Information in Pin Definitions Table © Cypress Semiconductor Corporation, 2006-2008. The information contained herein is subject to change without notice. Cypress Semiconductor Corporation assumes no responsibility for the use of any circuitry other than circuitry embodied in a Cypress product ...

Related keywords