lh28f004su-nc Sharp Microelectronics of the Americas, lh28f004su-nc Datasheet - Page 10

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lh28f004su-nc

Manufacturer Part Number
lh28f004su-nc
Description
512k Flash Memory
Manufacturer
Sharp Microelectronics of the Americas
Datasheet
LH28F004SU-NC
10
READ COMPATIBLE
STATUS REGISTER
CHECK IF DESIRED
CSR FULL STATUS CHECK PROCEDURE
CSR FULL STATUS
BLOCK ADDRESS
WRITE D0H AND
RETRY/ERROR
CLEAR CSRD
OPERATION
READ CSRD
COMPLETE
WRITE 20H
RECOVERY
(see above)
CSR.4, 5 =
CSR.7 =
CSR.3 =
START
(NOTE)
1
1
0
0
0
1
SUCCESSFUL
SUSPEND
Figure 6. Block Erase with Compatible Status Register
ERASE
V
DETECT
ERASE
PP
NO
LOW
ERASE LOOP
SUSPEND
YES
Repeat for subsequent Block Erasures.
CSR Full Status Check can be done after each Block Erase,
or after a sequence of Block Erasures.
Write FFH after the last operation to reset
device to read array mode.
See Command Bus Cycle notes for description of codes.
CSR.3, 4, 5 should be cleared, if set, before further attempts
are initiated.
NOTE:
If CSR.3 (VPPS) is set to '1', after clearing CSR.3/4/5,
1. Issue Reset WP command.
2. Retry Single Block Erase command.
3. Set WP command is issued, if necessary.
If CSR.3 (VPPS) is set to '0', after clearing CSR.3/4/5,
1. Retry Single Block Erase command.
Where power off or RP is set low during erase operation,
1. Clear CSR.3/4/5 and issue Reset WP command,
2. Retry Single Block Erase command.
3. Set WP command is issued, if necessary.
OPERATION
OPERATION
Standby
Standby
Standby
Write
Write
Read
BUS
BUS
Block Erase
COMMAND
COMMAND
Confirm
D = 20H
A = X
D = D0H
A = BA
Q = CSRD
Toggle CE or OE
to update CSRD
A = X
Check CSR.7
1 = WSM Ready
0 = WSM Busy
Check CSR.4, 5
1 = Erase Error
0 = Erase Successful
Both 1 = Command
Sequence Error
Check CSR.3
1 = V
0 = V
4M (512K × 8) Flash Memory
PP
PP
COMMENTS
COMMENTS
Low Detect
OK
28F004SUT-NC80-5

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