cat34ts02 ON Semiconductor, cat34ts02 Datasheet - Page 12

• Manufacturer Part Number: cat34ts02
• Description: Digital Output Temperature Sensor With On-board Spd Eeprom
• Manufacturer: ON Semiconductor

CAT34TS02
TEMPERATURE SENSOR OPERATION
The TS component in the CAT34TS02 combines a
Proportional to Absolute Temperature (PTAT) sensor
with a ∑-Δ modulator, yielding a 12 bit (13 bit including
sign) digital temperature representation.
The TS is free running on an internal clock, and starts
a conversion cycle at least every 100ms. The result of
the conversion is stored in the Temperature Value
(TV) Register. While a conversion is in progress,
attempts at reading the TV register will yield
temperature values corresponding to the previous
conversion. TV register contents are saved during
Shut-down periods.
At the end of the conversion cycle, the value stored in
the TV register is compared against limit values stored
in the Alarm Temperature Upper Boundary Trip, the
Alarm Temperature Lower Boundary Trip and
Critical Temperature Trip registers. If the measured
value is outside the boundary limits or above the
critical limit, then the EVENT
The EVENT
Configuration
comparator mode and polarity.
The temperature limit registers can be Read or
Written by the host, via the serial interface. At power-
on, these registers are initialized to default values,
and should be updated by the host to the desired
values.
REGISTERS
The CAT34TS02 contains eight 16-bit wide registers
allocated to TS functions, as shown in Table 3. Upon
power-up, the internal address counter points to the
capability register.
Capability Register (User Read Only)
This register lists the capabilities of the TS, as
detailed in the corresponding bit map.
Configuration Register (Read/Write)
This register controls the various operating modes of
the TS, as detailed in the corresponding bit map.
Temperature Trip Point Registers (Read/Write)
The
registers. They are the Alarm Temperature Upper
Boundary Trip register, the Alarm Temperature Lower
Boundary Trip register, and the Critical Temperature
Doc. No. MD-1129 Rev. C
¯¯¯¯¯¯ output function is programmable, via the
CAT34TS02
Register
features
¯¯¯¯¯¯ pin may be activated.
for
3
temperature
interrupt
mode,
limit
12
Trip register. The TV register contents are compared
to the various limit values, and the resulting event may
be used to activate the EVENT
superfluous EVENT
disabled while updating the limit registers. The pin
may be re-enabled, as soon as a valid comparison
can be expected. The format of the limit registers is
detailed in the corresponding bit maps. Data format is
two’s complement with the LSB representing 0.25°C.
Testing Temperature Trip Point Operation
A common technique for verifying temperature trip
points and operation of the upper, lower and critical
temperature threshold limits is to maintain a fixed
temperature and ‘sweep’ the trigger limits.
This completely digital technique is faster when
compared to raising and/or lowering the device
temperature itself (as would happen during normal
operation). In the present implementation of the
CAT34TS02, this method may yield false results,
since the various flag bits representing the relation
between actual temperature and limit values, are
updated only at the end of a conversion cycle, rather
than all the time. Therefore, the flag bits may take on
the correct value as late as perhaps 100 ms after the
limit registers have been reset and an attempt at
reading the TV register is made. Automated programs
used in testing temperature sensors would need to
take this delay into account in order to produce
meaningful results.
Temperature Value Register (User Read Only)
This register stores the trip status and the temperature
measured by the TS, as detailed in the corresponding
bit map. The temperature is stored in a 13-bit, two’s
complement format, with the MSB (D12) representing
the sign. The next bit (D11) represents 128°C, and the
LSB (D0) represents 0.0625°C. D15, D14 and D13
are the trip status bits, representing the internal
temperature trip detection and are not affected by the
status of the event or configuration bits. When both
the above’ (D14) and the ‘below’ (D13) bits are ‘0’, the
current temperature reading is within alarm window
boundaries, as defined in the configuration register.
Device ID and Revision Register (Read Only)
The manufacturer assigns the device ID and device
revision. The device revision starts at 0 and is
incremented by 1 whenever the manufacturer issues
an update to the device. The format of this register is
detailed in the corresponding bit map.
¯¯¯¯¯¯ pin activity, this pin can be
Characteristics subject to change without notice
¯¯¯¯¯¯ pin. To avoid
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