s-24c02bpphl Seiko Instruments Inc., s-24c02bpphl Datasheet - Page 18
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s-24c02bpphl
Manufacturer Part Number
s-24c02bpphl
Description
2-wire Cmos Serial E2prom
Manufacturer
Seiko Instruments Inc.
Datasheet
1.S-24C02BPPHL.pdf
(39 pages)
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18
8. Address increment timing
2-WIRE CMOS SERIAL E
S-24C02BPPHL
The address increment timing is as follows. During a read operation, the memory address counter is
automatically incremented at the falling edge of the SCL clock (where the 8th bit of read data is output).
During a write operation, the memory address counter is also automatically incremented at the falling edge of
the SCL clock when the 8th bit of write data is fetched.
SCL
SDA
SCL
SDA
R / W = 0
R / W = 1
Figure 17 Address Increment Timing in Write Operation
Figure 16 Address Increment Timing in Read Operation
8
8
2
PROM
ACK output
ACK output
9
9
Seiko Instruments Inc.
D7 output
D7 input
1
1
Address increment
D0 output
Address increment
D0 input
8
8
ACK output
9
9
Rev.2.2
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