s-24c32c Seiko Instruments Inc., s-24c32c Datasheet - Page 19

• Manufacturer Part Number: s-24c32c
• Description: 2-wire Serial Eeprom S-24c32c/64c 32k/64k-bit
• Manufacturer: Seiko Instruments Inc.

Rev.2.0
LINE
SDA
ADDRESS
7. 3 Sequential Read
DEVICE
When the S-24C32C/64C receives a 7-bit device address and a 1-bit read / write instruction code set to “1”
following a start condition both in current address read and random read, it responds with an acknowledge.
When an 8-bit data is output from the S-24C32C/64C synchronous to the SCL clock, the address counter is
automatically incremented.
When the master device responds with an acknowledge, the data at the next memory address is transmitted.
Response with an acknowledge by the master device has the memory address counter in the S-24C32C/64C
incremented and makes it possible to read data in succession. This is called “Sequential Read”.
The master device outputs stop condition not an acknowledge, the reading of S-24C32C/64C is ended.
Data can be read in succession in the sequential read mode. When the memory address counter reaches the
last word address, it rolls over to the first word address.
_00_H
W
R
E
A
D
R
1
/
A
C
K
D7
DATA (n)
D0
Figure 20 Sequential Read
A
C
K
D7
Seiko Instruments Inc.
DATA (n+1)
D0
A
C
K
D7
2-WIRE CMOS SERIAL E
DATA (n+2)
D0
C
A
K
D7
S-24C32C/64C
Master Device
NO ACK from
DATA (n+x)
2
PROM
19
D0
O
S
T
P