mt28f640j3rp-115-met Micron Semiconductor Products, mt28f640j3rp-115-met Datasheet - Page 50

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mt28f640j3rp-115-met

Manufacturer Part Number
mt28f640j3rp-115-met
Description
128mb, 64mb, 32mb Q-flash Memory
Manufacturer
Micron Semiconductor Products
Datasheet
Timing Parameters
NOTE:
09005aef80b5a323
MT28F640J3.fm – Rev. N 3/05 EN
SYMBOL
t
t
t
t
t
t
t
1. CEx low is defined as the first edge of CE0, CE1, or CE2 that enables the device. CEx high is defined at the first edge
2. V
3. Write block erase, write buffer, or program setup.
4. Write block erase or write buffer confirm, or valid address and data.
5. Automated erase delay.
6. Read status register or query data.
7. WRITE READ ARRAY command.
8. For valid status data,
RS
CS
WP
DS
AS
CH
DH
of CE0, CE1, or CE2 that disables the device (see Table 2 on page 11). STS is shown in its default mode (RY/BY#).
CC
power-up and standby.
DQ0–DQ15
CEx (WE#)
Addresses
WE# (CEx)
MIN
V
V
Disabled
Disabled
70
50
55
Enabled
Enabled
CC
1
0
0
0
CC
V
OE#
RP#
STS
PEN
Q = 2.7V–3.6V
t
WB always overrides
= 2.7V–3.6V
V
V
PENLK
PENH
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
OH
OL
IH
IH
IH
IH
IH
IH
IL
IL
IL
IL
IL
IL
IL
Note 2
t
RS
MAX
t
DS
Figure 20: WRITE Operations
t
CS
Note 3
A
IN
D
t
IN
WR after a state machine operation.
t
AS
UNITS
t
t
WP
WPH
µs
ns
ns
ns
ns
ns
ns
t
CH
t
DH
t
Note 4
VPS
A
IN
D
IN
50
t
WB
t
SYMBOL
t
t
t
t
t
t
t
AH
AH
WPH
VPS
WR
STS
VPH
WB
Note 5
t
t
STS
WR
BUSY SRD
VALID
Micron Technology, Inc., reserves the right to change products or specifications without notice.
Note 8
t
VPH
Note 6
READY SRD
VALID
MIN
128Mb, 64Mb, 32Mb
V
V
30
35
CC
0
0
0
CC
Q-FLASH MEMORY
Q = 2.7V–3.6V
= 2.7V–3.6V
D
Note 7
UNDEFINED
IN
MAX
200
200
©2000 Micron Technology. Inc.
UNITS
ns
ns
ns
ns
ns
ns
ns

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