w29c040 Winbond Electronics Corp America, w29c040 Datasheet

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w29c040

Manufacturer Part Number
w29c040
Description
512k X 8 Cmos Flash Memory
Manufacturer
Winbond Electronics Corp America
Datasheet

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GENERAL DESCRIPTION
The W29C040 is a 4-megabit, 5-volt only CMOS page mode EEPROM organized as 512K
The device can be written (erased and programmed) in-system with a standard 5V power supply. A
12-volt V
program) operations with extremely low current consumption compared to other comparable 5-volt
flash memory products. The device can also be written (erased and programmed) by using standard
EPROM programmers.
FEATURES
Single 5-volt write (erase and program)
operations
Fast page-write operations
Fast chip-erase operation: 50 mS
Two 16 KB boot blocks with lockout
Typical page write (erase/program) cycles:
1K/10K (typ.)
Read access time: 90/120 nS
Ten-year data retention
256 bytes per page
Page write (erase/program) cycle: 5 mS
(typ.)
Effective byte-write (erase/program) cycle
time: 19.5 S
Optional software-protected data write
PP
is not required. The unique cell architecture of the W29C040 results in fast write (erase/
512K
- 1 -
8 CMOS FLASH MEMORY
Automatic write (erase/program) timing with
Software and hardware data protection
Low power consumption
internal V
End of write (erase/program) detection
Latched address and data
All inputs and outputs directly TTL compatible
JEDEC standard byte-wide pinouts
Available packages: TSOP and PLCC
Active current: 25 mA (typ.)
Standby current: 20 A (typ.)
Toggle bit
Data polling
PP
generation
Publication Release Date: May 1999
W29C040
Revision A5
8 bits.

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w29c040 Summary of contents

Page 1

... The W29C040 is a 4-megabit, 5-volt only CMOS page mode EEPROM organized as 512K The device can be written (erased and programmed) in-system with a standard 5V power supply. A 12-volt V is not required. The unique cell architecture of the W29C040 results in fast write (erase/ PP program) operations with extremely low current consumption compared to other comparable 5-volt flash memory products ...

Page 2

... DQ0 GND - 2 - W29C040 DQ0 OUTPUT CONTROL BUFFER DQ7 16K Byte Boot Block (Optional) CORE DECODER ARRAY 16K Byte Boot Block (Optional) PIN NAME Address Inputs Data Inputs/Outputs Chip Enable Output Enable Write Enable Power Supply Ground ...

Page 3

... FUNCTIONAL DESCRIPTION Read Mode The read operation of the W29C040 is controlled by CE and OE , both Chip of which have to be low for the host to obtain data from the outputs used for device selection. When CE is high, the chip is de-selected and only standby power will be consumed the output control and is used to gate data from the output pins ...

Page 4

... The W29C040 includes a data polling feature to indicate the end of a write cycle. When the W29C040 is in the internal write cycle, any attempt to read DQ7 of the last byte loaded during the page/byte-load cycle will receive the complement of the true data. Once the write cycle is completed. ...

Page 5

... Toggle Bit (DQ6)- Write Status Detection In addition to data polling, the W29C040 provides another method for determining the end of a write cycle. During the internal write cycle, any consecutive attempts to read DQ6 will produce alternating 0's and 1's. When the write cycle is completed, this toggling between 0's and 1's will stop. The device is then ready for the next operation ...

Page 6

... Load data AA to address 5555 Load data 55 to address 2AAA Load data A0 to address 5555 Sequentially load up to 256 bytes of page data Pause 10 mS Exit - 6 - W29C040 TO DISABLE PROTECTION ADDRESS DATA 5555H AAH 2AAAH 55H 5555H 80H 5555H AAH 2AAAH 55H 5555H ...

Page 7

... Load data 55 to address 2AAA Load data 80 to address 5555 Load data AA to address 5555 Load data 55 to address 2AAA Load data 10 to address 5555 Pause 50 mS Exit Publication Release Date: May 1999 - 7 - W29C040 DATA AAH 55H 80H AAH 55H 10H Revision A5 ...

Page 8

... Read address = 00000 to data = DA (2) Read address = 00001 data = 46 (4) Read address = 00002 data = FF/FE (5) Read address = 7FFF2 data = FF/FE ; device code is read for W29C040 SOFTWARE PRODUCT IDENTIFICATION/BOOT BLOCK LOCKOUT DETECTION EXIT DATA ADDRESS AAH 5555H 55H 2AAAH 80H 5555H AAH - 55H - ...

Page 9

... Load data address 5555 address 5555 Load data 00 Load data address 00000 address 3FFFF Pause 10 mS Pause W29C040 BOOT BLOCK LOCKOUT FEATURE SET ON LAST 16K ADDRESS BOOT BLOCK ADDRESS DATA 5555H AAH 2AAAH 55H 5555H 80H 5555H AAH 2AAAH ...

Page 10

... -0.3V, all DQs DD open V = GND GND 2 -400 A OH1 -100 4.5V OH2 W29C040 RATING -0 +70 -65 to +150 -0 +1 +1.0 DD -0.5 to 12.5 LIMITS MIN. TYP. MAX 100 - - 0.8 2 ...

Page 11

... TTL Gate and C +5V 1.8K D OUT 1.3K 100 pF for 90/120 nS (Including Jig and Scope) Input Output 3V 1.5V 1.5V 0V Test Point Test Point - 11 - W29C040 TYPICAL UNIT 100 MAX. UNIT CONDITIONS = 100 pF for 90/120/150 nS L Publication Release Date: May 1999 Revision A5 ...

Page 12

... CHZ T - OHZ SYMBOL MIN OES T OEH 100 WPH BLC W29C040 W29C040-12 MIN. MAX. - 120 - 90 - 120 90 - 120 TYP. MAX ...

Page 13

... T 10 OEH (1) SYMBOL MIN OEH 150 OEHP Data Valid - 13 - W29C040 TYP. MAX TYP. MAX OHZ OH T CHZ High-Z Data Valid T AA Publication Release Date: May 1999 Revision A5 UNIT ...

Page 14

... CE Controlled Write Cycle Timing Diagram Address A18 High Z DQ7 OES Data Valid OES Data Valid - 14 - W29C040 OEH T WPH T DH Internal write starts WPH T OEH Internal Write Starts ...

Page 15

... Page Write Cycle Timing Diagram Address A18-0 DQ7 DATA Polling Timing Diagram Address A18 DQ7 T BLC T WPH T WP Byte 1 Byte 0 Byte 2 T OEH DH HIGH W29C040 T WC Byte N-1 Byte N Internal Write Start T WR Publication Release Date: May 1999 Revision A5 ...

Page 16

... Page Write Timing Diagram Software Data Protection Mode software data protection mode Address A18-0 5555 DQ7 SW0 T OE HIGH-Z Byte/page load Three-byte sequence for cycle starts 2AAA 5555 BLC T WPH Byte 0 SW1 SW2 - 16 - W29C040 Byte N Byte N-1 (Last Byte) Internal write starts ...

Page 17

... Six-byte code for 5V-only software chip erase 5555 5555 2AAA 2AAA BLC T WPH SW0 SW2 SW3 SW4 SW1 - 17 - W29C040 T WC 5555 55 20 SW4 SW5 Internal programming starts T WC 5555 55 10 SW5 Internal erasing starts Publication Release Date: May 1999 Revision A5 ...

Page 18

... W29C040P-12 120 W29C040T-90B 90 W29C040T-12B 120 W29C040P-90B 90 W29C040P-12B 120 Notes: 1. Winbond reserves the right to make changes to its products without prior notice. 2. Purchasers are responsible for performing appropriate quality assurance testing on products intended for use in applications where personal injury might occur as a consequence of product failure. ...

Page 19

... TSOP 0.10 (0.004 W29C040 Dimension in Inches Dimension in mm Symbol Min. Nom. Max. Min. Nom. Max. A 0.140 3.56 A 0.020 0. 0.105 0.110 0.115 2.67 2.80 2. 0.026 0.032 0.66 0.81 0.028 0. ...

Page 20

... Winbond Electronics (H.K.) Ltd. Rm. 803, World Trade Square, Tower II, 123 Hoi Bun Rd., Kwun Tong, Kowloon, Hong Kong TEL: 852-27513100 FAX: 852-27552064 - 20 - W29C040 DESCRIPTION Winbond Electronics North America Corp. Winbond Memory Lab. Winbond Microelectronics Corp. Winbond Systems Lab. 2727 N. First Street, San Jose, CA 95134, U ...

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