hm628512c Renesas Electronics Corporation., hm628512c Datasheet - Page 14

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hm628512c

Manufacturer Part Number
hm628512c
Description
Memory>low Power Sram 4 M Sram 512-kword 8-bit
Manufacturer
Renesas Electronics Corporation.
Datasheet

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HM628512C Series
Low V
Parameter
V
Data retention current
Chip deselect to data retention time t
Operation recovery time
Notes: 1. For L-version and 10 A (max.) at Ta = –20 to +40 C.
Low V
12
CC
0 V
V
2.2 V
V
4.5 V
CS
for data retention
CC
DR
CC
2. For L-SL-version and 3 A (max.) at Ta = –20 to +40 C.
3. CS controls address buffer, WE buffer, OE buffer, and Din buffer. In data retention mode, Vin
4. Typical values are at V
5. t
CC
Data Retention Timing Waveform (CS Controlled)
levels (address, WE, OE, I/O) can be in the high impedance state.
Data Retention Characteristics (Ta = –20 to +70 C)
RC
= read cycle time.
t
CDR
CC
= 3.0 V, Ta = +25 C and specified loading, and not guaranteed.
Symbol
V
I
t
CCDR
CDR
R
DR
Data retention mode
Min
2
0
t
RC
CS
*
5
Typ
0.8*
0.8*
V
CC
4
4
– 0.2 V
Max
20*
10*
1
2
Unit
V
ns
ns
A
A
Test conditions*
CS
V
CS
See retention waveform
CC
= 3.0 V, Vin
V
V
CC
CC
– 0.2 V, Vin
– 0.2 V
t
R
3
0 V
0 V

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