viper50b STMicroelectronics, viper50b Datasheet - Page 16

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viper50b

Manufacturer Part Number
viper50b
Description
Smps Primary I.c.
Manufacturer
STMicroelectronics
Datasheet

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VIPER50B/BSP
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Figure 22: Recommended layout
LAYOUT CONSIDERATIONS
Some simple rules insure a correct running of
switching power supplies. They may be classified
into two categories:
-
-
To minimise power loops: the way the switched
power current must be carefully analysed and
the corresponding paths must present the
smallest inner loop area as possible. This
avoids radiated EMC noises, conducted EMC
noises by magnetic coupling, and provides a
better
inductances, especially on secondary side.
To use different tracks for low level signals and
efficiency
dio des b rid g e
F rominput
by
C1
eliminating
R1
C2
1
U1
VIPer50B
OSC
13V
ISO1
2
VDD
parasitic
-
+
C3
COMP SOURCE
R2
C4
5
DRAIN
4
3
In case of VIPer, these rules apply as shown on
figure 22. The loops C1-T1-U1, C5-D2-T1,
C7-D1-T1 must be minimised. C6 must be as
close
components C2, ISO1, C3 and C4 are using a
dedicated track to be connected directly to the
source of the device.
power ones. The interferences due to a mixing
of signal and power may result in instabilities
and/or anomalous behaviour of the device in
case
overvoltages, output short circuits...).
as
C5
D2
of
T1
possible
C6
violent
D1
FC00500
C7
from
power
filte ringa nd lo a d
To seconda ry
T1.
surge
The
(Input
signal

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