ncp1091 ON Semiconductor, ncp1091 Datasheet - Page 4

• Manufacturer Part Number: ncp1091
• Description: Ncp1090, Ncp1091, Ncp1092 Integrated Ieee 802.3af Poe-pd Interface Controller
• Manufacturer: ON Semiconductor

Operating Conditions
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
1. Tj−TSD allowed during error conditions only. It is assumed that this maximum temperature condition does not occur more than 1 hour
2. Low qJA is obtained with 2S2P test board (2 signal − 2 plane). High qJA is obtained with double sideboard with minimum pad area and natural
Table 1. PIN DESCRIPTION
Table 2. ABSOLUTE MAXIMUM RATINGS
ESD−CDM
ESD−HBM
VPORTN
VPORTP
ESD−MM
INRUSH
PGOOD
VPORTP
INRUSH
cumulative during the useful life for reliability reasons.
convection. Refer to Jedec JESD51 for details.
PGOOD
CLASS
Symbol
Tj−TSD
CLASS
Name
UVLO
UVLO
DET
RTN
AUX
TθJA
AUX
RTN
NC
T
LU
Ta
Tj
stg
NCP1090
Analog ground supply 2
Junction to Air (Note 2)
Charged Device Model
Ambient temperature
Junction temperature
Junction temperature
Storage Temperature
Thermal Resistance,
Human Body Model
Input power supply
1
2
3
4
5
6
7
−
−
8
Machine Model
Analog output
Analog output
Analog output
Analog input
Analog input
Parameter
Latch−up
(Note 1)
NCP1091
Pin No.
1
2
3
4
5
6
−
7
−
8
NCP1092
1
2
3
4
5
6
−
−
7
8
±100
−0.3
−0.3
−0.3
−0.3
−0.3
−0.3
−0.3
Min
−40
−55
150
160
500
200
−
−
2
Max
Open Drain
Open Drain
125
175
150
240
260
3.6
3.6
72
72
72
72
72
85
http://onsemi.com
Output,
Ground
Ground
Output,
Output
Output
Type
Input
Input
Input
−
Units
°C/W
mA
kV
°C
°C
°C
°C
4
V
V
V
V
V
V
V
V
V
Current limit programming pin. Connect a resistor between
INRUSH and VPORTN.
Classification current programming pin. Connect a resistor
between CLASS and VPORTN.
Detection pin. Connect a 24.9 kW resistor between DET and
VPORTP for a valid PD detection signature.
Negative input power. Connected to the source of the internal
pass−switch
DC−DC controller power return. Connected to the drain of the
internal pass−switch
Open Drain Power Good Indicator. Pin is in HZ mode when the
power good signal is active.
No connection
Under−voltage lockout input. Voltage with respect to VPORTN.
Connect a resistor−divider from VPORTP to UVLO to
VPORTNx to set an external UVLO threshold.
Auxiliary Pin. When this pin is pulled up, the Pass Switch is
disabled and allows a supply transition from PSE to the rear
auxiliary supply connected between VPORTP and RTN.
Positive input power. Voltage with respect to VPORTN.
Voltage with respect to VPORTN
Pass−switch in off−state (voltage with respect to VPORTN)
Voltage with respect to VPORTN
Voltage with respect to VPORTN
Voltage with respect to VPORTN
Voltage with respect to VPORTN
Voltage with respect to RTN
Thermal shutdown condition
SOIC−8
TSSOP−8
per EIA−JESD22−A114 standard
per ESD−STM5.3.1 standard
per EIA−JESD22−A115−A standard
per JEDEC Standard JESD78
Description
Conditions