ncp1560hdr2g ON Semiconductor, ncp1560hdr2g Datasheet - Page 4

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ncp1560hdr2g

Manufacturer Part Number
ncp1560hdr2g
Description
Full Featured Voltage Mode Pwm Controller
Manufacturer
ON Semiconductor
Datasheet
PIN DESCRIPTION
Pin
10
12
13
14
15
16
11
1
2
3
4
5
6
7
8
9
DC
UV/OV
Name
C
OUT2
OUT1
V
V
GND
V
NC
CS
V
FF
R
SS
SKIP
AUX
REF
t
MAX
EA
D
in
T
This pin is connected to the bulk DC input voltage supply. A constant current source supplies current from
this pin to the capacitor connected on the V
range is 21.5 V to 150 V.
Input supply voltage is scaled down and sampled by means of a resistor divider. The supply voltage must
be scaled down between 1.52 V and 3.61 V within the specified input voltage range.
Not Connected.
An external resistor between V
varying the feedforward ramp amplitude in proportion to the input voltage, changes in loop bandwidth are
eliminated.
Over current sense input. If the CS voltage exceeds 0.48 V or 0.57 V, the converter enters the
Cycle−by−Cycle or Cycle Skip current limit mode, respectively.
The capacitor connected between this pin and ground sets the Cycle Skip period. A soft−start sequence
follows at the conclusion of the fault period.
A single external resistor between this pin and GND sets the oscillator fixed frequency.
An external resistor between this pin and GND sets the voltage on the Max DC Comparator inverting
input. The duty cycle is limited by comparing the voltage on the Max DC Comparator inverting input to the
Feedforward Ramp.
An internal 6.2 mA current source charges the external capacitor connected to this pin. The duty cycle is
limited during startup by comparing the voltage on this pin to the Oscillator Ramp.
The error signal from an external error amplifier is fed into this input and compared to the Feedforward
Ramp. A series diode and resistor offset the voltage on this pin before it is applied to the PWM
Comparator inverting input.
Precision 5.0 V reference output. Maximum output current is 6.0 mA.
An external resistor between V
transitions.
Output of the PWM controller with leading and trailing edge overlap delay. OUT2 can be used to drive a
synchronous rectifier topology, an active clamp/reset switch, or both.
Control circuit ground.
Main output of the PWM controller.
Positive input supply voltage. This pin is connected to an external capacitor for energy storage. An
internal current supplies current from V
source turns OFF. It turns ON again once V
to the IC via this pin, by means of an auxiliary winding.
http://onsemi.com
in
REF
and this pin adjusts the amplitude of the FF Ramp in proportion to V
and this pin sets the overlap delay between OUT1 and OUT2
4
in
Application Information
to this pin. Once the voltage on V
AUX
AUX
pin. The charge current is typically 13.8 mA. Input voltage
falls to 7.0 V. During normal operation, power is supplied
AUX
reaches 11 V, the current
in
. By

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