l6660 STMicroelectronics, l6660 Datasheet - Page 7
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l6660
Manufacturer Part Number
l6660
Description
Milli-actuator Driver
Manufacturer
STMicroelectronics
Datasheet
1.L6660.pdf
(9 pages)
Available stocks
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Part Number
Manufacturer
Quantity
Price
Part Number:
l6660V2.0
Manufacturer:
ST
Quantity:
20 000
Not selected Output return to 0V
Using the Multiplexer features and selecting just
one driver, the second one, leaves its output volt-
age and "goes" to 0V (have showed in Fig. 3), in
"long time" with controlled slope see table 1.
Voltage reference
An internal 2.5V voltage reference generator is
connected to PIN13 (VrefOUT); it is based on an
internal Band-Gap reference with a total precision
of 4% and a current capability of 1.0mA, it is al-
ways present even in sleep mode condition.
This voltage is used to supply the internal MUX
logic, allowing both 3.3V or 5V logic input signals,
also the internal bias current is based on this ref-
erence.
The DC-DC converter reference voltage comes
from PIN14 (VrefIN), so that the user can use an
external voltage reference (from 2.0V up to 2.6V)
or the internal one, in this case, just shorting to-
gether VrefOUT and VrefIN (PIN13 and PIN14).
Voltage Shifter
A voltage shifter is inserted to allow a ground
symmetrical driving voltage on the piezo, starting
from a positive (0V up to 5V) input signal coming
from a positive supplied DAC. The DC Input-Out-
put typical tranfer function is plotted in Fig. 4. This
block works only in Double Supply mode, obvi-
ously it doesn’t work if no negative supply is pre-
sent. The voltage shifter output has not DC-cur-
rent capability.
For more details see the application note.
DC-DC CONVERTER DESCRIPTION
The DC-DC converter inside the chip can be sup-
plied from 5V up to 12V and has two parts, one to
supply the positive and one to supply the nega-
tive voltage.
The DC-DC converter loop "measures" the HVP
voltage by the EXTERNAL voltage divider and
Figure 4. Shifter DC transfer function
V
IN,MAX
0-VrefIN
- VrefIN
PIN10
Vosh
0
V
IN,MAX
VrefIN
=
{
5.0V IF V
V5/12 - 0.5V IF V
5/12
> 5.5V
5/12
V
IN,MAX
5.5V
Vin0-5
PIN11
PIN21. The HVP voltage is programmed by two
external resistors as shown in the block diagram,
its value is:
The DC-DC control loop precision will be im-
proved lower than
ence voltage and resistor voltage divider.
In Sleep Mode HVM is shorted to GND. When in
single supply, HVM must be connected to GND.
The topology is a standard resonant full-wave
boost one: the LC oscillation is kept running all
the time and a set of comparators is used to syn-
chronize turning on and off of the power MOS in
order to have zero current and zero voltage
switching and furthermore controlled rectification.
The step-up converter is designed to work in Lin-
ear mode, and an AC compensation network is
required (RC-comp) to guarantee the stability in a
wide operative range (i.e. changing coil, load,
output and input voltage...).
According to the ouput voltage, the current
loaded into the coil is changing like a Voltage
Loop-Current Controlled system, and in every
pulse there is a regulated power transfer to the
load.
The resonant LC topology has been chosen in or-
der to limit the voltage slew-rate across the coil
within reasonable values and so, to minimize ra-
diation problems.
The negative converter is a simple charge trans-
fer: it is supplied by the positive high voltage and
it capacitively translates this positive voltage
down to a negative one, obviously to limit radia-
tion problems also the charge output has a lim-
ited slew-rate; moreover to reduce intermodula-
tion
synchronized with the LC oscillations of the reso-
nant boost.
This negative voltage is (not counting drops on
external rectification diodes) in tracking with the
positive one and so the negative output controller
is not required.
If the drivers are supplied by HVP & HVM gener-
ated by external power supply the error amplifier
output has to be connected to V5/12.
In the external supply configuration the maximum
voltage between HVP and HVM (|HVP| + |HVM|)
must not exceed 70V and maximum voltage be-
tween GND and HVM must be lower than 35V.
phoenomenas
V
HVP
V
PIN21
4% respect external refer-
the
1
charge
R
R
fdb1
fdb2
output
L6660
7/9
is