sgp100 Fairchild Semiconductor, sgp100 Datasheet - Page 11

• Manufacturer Part Number: sgp100
• Description: Sgp100 Primary-side-control Pwm Controller
• Manufacturer: Fairchild Semiconductor

Primary-side-control PWM Controller
Temperature Compensation
The SGP100 has built-in temperature compensation
circuitry to provide constant reliable voltage regulation at
differing ambient temperatures. This internal positive
temperature coefficient (PTC) compensation current is
used to compensate for the temperature due to the
forward-voltage drop of the diode output. The internal
PTC current passes through the external resistor (R
value of R
amount. The suggested value for R
+/-1% tolerance value.
Leading-Edge Blanking
Each time the power MOSFET is switched on, a turn-on
spike occurs at the sense resistor. To avoid premature
termination of the switching pulse, a 150ns leading-edge
blanking time is built in. Conventional RC filtering can
therefore be omitted. During this blanking period, the
current-limit comparator is disabled and cannot switch off
the gate driver.
Under-Voltage Lockout (UVLO)
The turn-on and turn-off thresholds are fixed internally at
16V/6.75V. During start-up, the hold-up capacitor must
be charged to 16V through the start-up resistor, so that the
SGP100 is enabled. The hold-up capacitor continues to
supply V
auxiliary winding of the main transformer. V
drop below 6.75V during this start-up process. This
UVLO hysteresis window ensures that hold-up capacitor
is adequate to supply V
© System General Corp.
Version 1.1.1 (IAO33.0042.B1)
PTC
Figure 4. Temperature Compensation
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1
Temperature
Compensation
determines the temperature compensation
until power can be delivered from the
SGP100
Vs
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10k~20k
during start-up.
R
±
1%
1
1
+
V
−
is 10~20KΩ with a
R1
Auxiliary
Winding
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must not
1
). The
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V
V
over-voltage conditions. When the voltage V
28V due to abnormal conditions, PWM output is latched
off. Over-voltage conditions are usually caused by open
feedback loops.
Over-Temperature Protection (OTP)
The SGP100 has a built-in temperature sensing circuit to
shut down the PWM output then enters latch mode once
the junction temperature exceeds 150°C. When the PWM
output shuts down, the V
UVLO voltage. The PWM controller does not release
latch mode until the AC is unplugged.
Gate Output
The SGP100 BiCMOS output stage is a fast totem pole
gate driver. Cross conduction is avoided to minimize heat
dissipation, increase efficiency, and enhance reliability.
The output driver is clamped by an internal 18V Zener
diode to protect power MOSFET transistors from
undesired over-voltage gate signals.
Built-in Slope Compensation
The sensed voltage across the current-sense resistor is
used for current mode control and pulse-by-pulse current
limiting. Built-in slope compensation improves stability
and prevent sub-harmonic oscillations due to peak-current
mode control. The SGP100 has a synchronized,
positively-sloped ramp built-in at each switching cycle.
Noise Immunity
Noise from the current sense or the control signal can
cause significant pulse width jitter. While slope
compensation helps alleviate these problems, further
precautions should still be taken. Good placement and
layout practices should be followed. Avoiding long PCB
traces and component leads, locating compensation and
filter components near the SGP100, and increasing the
power MOS gate resistance improves performance.
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Over-Voltage Protection
over-voltage protection prevents damage due to
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voltage gradually drops to the
Product Specification
September 26, 2007
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SGP100
exceeds