lt3651-4.2 Linear Technology Corporation, lt3651-4.2 Datasheet - Page 16

• Manufacturer Part Number: lt3651-4.2
• Description: Monolithic 4a High Voltage Li-ion Battery Charger Features
• Manufacturer: Linear Technology Corporation

applicaTions inForMaTion
LT3651-4.2
the BAT voltage rises above the precondition threshold,
normal full-current charging can commence. The LT3651
incorporates 2.5% of threshold for hysteresis to prevent
mode glitching.
When the internal timer is used for termination, bad
battery detection is engaged. This fault detection feature
is designed to identify failed cells. A bad battery fault is
triggered when the voltage on BAT remains below the
precondition threshold for greater than one-eighth of a full
timer cycle (one-eighth end-of-cycle). A bad battery fault
is also triggered if a normally charging battery re-enters
precondition mode after one-eighth end-of-cycle.
When a bad battery fault is triggered, the charge cycle
is suspended, so the CHRG status pin becomes high
impedance. The FAULT pin is pulled low to signal a fault
detection. The RNG/SS pin is also pulled low during this
fault, to accommodate a graceful restart, in the event that
a soft-start function is incorporated (see the RNG/SS:
Soft-Start section).
Cycling the charger’s power or SHDN function initiates a
new charge cycle, but a LT3651 charger does not require
a reset. Once a bad battery fault is detected, a new timer
charge cycle initiates when the BAT pin exceeds the pre-
condition threshold voltage. During a bad battery fault,
1mA is sourced from the charger. Removing the failed
battery allows the charger output voltage to rise and initiate
a charge cycle reset. In that way removing a bad battery
resets the LT3651. A new charge cycle is started by con-
necting another battery to the charger output.
Battery Temperature Fault: NTC
The LT3651 can accommodate battery temperature moni-
toring by using an NTC (negative temperature coefficient)
thermistor close to the battery pack. The temperature
monitoring function is enabled by connecting a 10kΩ,
B = 3380 NTC thermistor from the NTC pin to ground. If the
NTC function is not desired, leave the pin unconnected.
The NTC pin sources 50µA and monitors the voltage
dropped across the 10kΩ thermistor. When the voltage
on this pin is above 1.36V (0°C) or below 0.29V (40°C),
the battery temperature is out of range, and the LT3651
triggers an NTC fault. The NTC fault condition remains until

the voltage on the NTC pin corresponds to a temperature
within the 0°C to 40°C range. Both hot and cold thresholds
incorporate hysteresis that corresponds to 2.5°C.
During an NTC fault, charging is halted and both status
pins are pulled low. If timer termination is enabled, the
timer count is suspended and held until the fault condi-
tion is relieved. The RNG/SS pin is also pulled low during
this fault, to accommodate a graceful restart in the event
that a soft-start function is being incorporated (see the
RNG/SS: Soft-Start section).
If higher operational charging temperatures are desired,
the temperature range can be expanded by adding se-
ries resistance to the 10k NTC resistor. Adding a 0.91k
(0TC)resistor will increase the effective temperature
threshold to 45°C.
Thermal Foldback
The LT3651 contains a thermal foldback protection fea-
ture that reduces maximum charger output current if the
internal IC junction temperature approaches 125°C. In
most cases, on-chip temperature servos such that any
overtemperature conditions are relieved with only slight
reductions in maximum charge current.
In some cases, the thermal foldback protection feature
can reduce charge currents below the C/10 threshold. In
applications that use C/10 termination (TIMER = 0V), the
LT3651 will suspend charging and enter standby mode
until the overtemperature condition is relieved.
Layout Considerations
The LT3651 switch node has rise and fall times that are
typically less than 10ns to maximize conversion efficiency.
These fast switch times require care in the board layout
to minimize noise problems. The philosophy is to keep
the physical area of high current loops small (the inductor
charge/discharge paths) to minimize magnetic radiation.
Keep traces wide and short to minimize parasitic inductance
and resistance and shield fast switching voltage nodes
(SW, BOOST) to reduce capacitive coupling.
The switched node (SW pin) trace should be kept as
short as possible to minimize high frequency noise. The
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