s-8211eae-i6t1g Seiko Instruments Inc., s-8211eae-i6t1g Datasheet - Page 10

• Manufacturer Part Number: s-8211eae-i6t1g
• Description: Lithium-ion Battery Protection Ics
• Manufacturer: Seiko Instruments Inc.

10
BATTERY PROTECTION IC FOR 1-CELL PACK
S-8211E Series
Test Circuits
Caution Unless otherwise specified, the output voltage levels “H” and “L” at CO pin (V
(1) Overcharge Detection Voltage, Overcharge Release Voltage
(2) Overdischarge Detection Voltage, Overdischarge Release Voltage
(3) Operating Current Consumption
(4) Overdischarge Current Consumption
(5) CO Pin Resistance “H”
(6) CO Pin Resistance “L”
(7) DO Pin Resistance “H”
(8) DO Pin Resistance “L”
The CO pin resistance “H” (R
0 V, V3 = 3.0 V.
The CO pin resistance “L” (R
0 V, V3 = 0.5 V.
(Test Condition 1, Test Circuit 1)
Overcharge detection voltage (V
from “H” to “L” when the voltage V1 is gradually increased from the starting condition of V1 = 3.5 V. Overcharge
release voltage (V
when the voltage V1 is then gradually decreased. Overcharge hysteresis voltage (V
between overcharge detection voltage (V
(Test Condition 2, Test Circuit 2)
Overdischarge detection voltage (V
from “H” to “L” when the voltage V1 is gradually decreased from the starting condition of V1 = 3.5 V, V2 = 0 V.
Overdischarge release voltage (V
from “L” to “H” when the voltage V1 is then gradually increased. Overdischarge hysteresis voltage (V
the difference between overdischarge release voltage (V
(Test Condition 3, Test Circuit 2)
The operating current consumption (I
of V1 = 3.5 V and V2 = 0 V (normal status).
(Test Condition 3, Test Circuit 2)
The overdischarge current consumption (I
conditions of V1 = 1.5 V, V2 = 0V (overdischarge status).
(Test Condition 4, Test Circuit 3)
(Test Condition 4, Test Circuit 3)
(Test Condition 5, Test Circuit 3)
The DO pin H resistance (R
0 V, V4 = 3.0 V.
(Test Condition 5, Test Circuit 3)
The DO pin L resistance (R
0 V, V4 = 0.5 V.
judged by the threshold voltage (1.0 V) of the N-channel FET. Judge the CO pin level with respect to
V
VM
and the DO pin level with respect to V
CL
) is defined as the voltage between the VDD pin and VSS pin at which V
DOL
DOH
COL
COH
) is the resistance at the DO pin under the set conditions of V1 = 1.8 V, V2 =
CU
) is the resistance at the DO pin under the set conditions of V1 = 3.5 V, V2 =
) is the resistance at the CO pin under the set conditions of V1 = 4.5 V, V2 =
DU
) is the resistance at the CO pin under the set conditions of V1 = 3.5 V, V2 =
) is defined as the voltage between the VDD pin and VSS pin at which V
DL
) is defined as the voltage between the VDD pin and VSS pin at which V
) is defined as the voltage between the VDD pin and VSS pin at which V
OPE
) is the current that flows through the VDD pin (I
CU
Seiko Instruments Inc.
) and overcharge release voltage (V
OPED
) is the current that flows through the VDD pin (I
SS
.
DU
) and overdischarge detection voltage (V
CL
).
HC
) is defined as the difference
DD
CO
) under the set conditions
) and DO pin (V
CO
goes from “L” to “H”
DL
DD
HD
).
) under the set
Rev.1.0
) is defined as
CO
DO
DO
DO
goes
) are
goes
goes
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