lt3071 Linear Technology Corporation, lt3071 Datasheet - Page 11
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lt3071
Manufacturer Part Number
lt3071
Description
Lt3071 5a, Low Noise, Programmable Output, 85mv Dropout Linear Regulator With Analog Margining Features
Manufacturer
Linear Technology Corporation
Datasheet
1.LT3071.pdf
(28 pages)
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pin Functions
VIOC (Pin 1): Voltage for In-to-Out Control. The IC in-
corporates a unique tracking function to control a buck
regulator powering the LT3071’s input. The VIOC pin is
the output of this tracking function that drives the buck
regulator to maintain the LT3071’s input voltage at V
300mV. This function maximizes efficiency and minimizes
power dissipation. See the Applications Information sec-
tion for more information on proper control of the buck
regulator.
PWRGD (Pin 2): Power Good. The PWRGD pin is an open-
drain NMOS output that actively pulls low if any one of
these fault modes is detected:
• V
• V
• Junction temperature typically exceeds 145°C.
• V
• The OUT-to-IN reverse-current detector activates.
See the Applications Information section for more infor-
mation on PWRGD fault modes.
REF/BYP (Pin 3): Reference Filter. The pin is the output
of the bandgap reference and has an impedance of ap-
proximately 19kΩ. This pin must not be externally loaded.
Bypassing the REF/BYP pin to GND with a 10nF capacitor
decreases output voltage noise and provides a soft-start
function to the reference. LTC recommends the use of a
high quality, low leakage capacitor. See the Applications
Information section for more information on noise and
output voltage margining considerations.
GND (Pins 4, 9-14, 20, 26, Exposed Pad Pin 29): Ground.
The exposed pad of the QFN package is an electrical con-
nection to GND. To ensure proper electrical and thermal
performance, solder Pin 29 to the PCB ground and tie to
all GND pins of the package. These GND pins are fused
to the internal die attach paddle and the exposed pad to
optimize heat sinking and thermal resistance characteris-
tics. See the Applications Information section for thermal
considerations and calculating junction temperature.
edge of V
25µs.
OUT
OUT
BIAS
is less than 90% of V
drops below 85% of V
is less than its undervoltage lockout threshold.
OUT
.
OUT(NOMINAL)
OUT(NOMINAL)
for more than
on the rising
OUT
+
IN (Pins 5, 6, 7, 8): Input Supply. These pins supply
power to the high current pass transistor. Tie all IN pins
together for proper performance. The LT3071 requires a
bypass capacitor at IN to maintain stability and low input
impedance over frequency. A 47µF input bypass capacitor
suffices for most battery and power plane impedances.
Minimizing input trace inductance optimizes performance.
Applications that operate with low V
voltages and that have large, fast load transients may require
much higher input capacitor requirements to prevent the
input supply from drooping and allowing the regulator to
enter dropout. See the Applications Information section
for more information on input capacitor requirements.
OUT (Pins 15, 16, 17, 18): Output. These pins supply
power to the load. Tie all OUT pins together for proper
performance. A minimum output capacitance of 15µF is
required for stability. LTC recommends low ESR, X5R or
X7R dielectric ceramic capacitors for best performance.
A parallel ceramic capacitor combination of 10µF + 4.7µF
+ 2.2µF or 15 1µF ceramic capacitors in parallel provide
excellent stability and load transient response. Large load
transient applications require larger output capacitors to
limit peak voltage transients. See the Applications Infor-
mation section for more information on output capacitor
requirements.
SENSE (Pin 19): Kelvin Sense for OUT . The SENSE pin is
the inverting input to the error amplifier. Optimum regulation
is obtained when the SENSE pin is connected to the OUT
pins of the regulator. In critical applications, the resistance
(R
small voltage drops, creating a load regulation error at the
point of load. Connecting the SENSE pin at the load instead
of directly to OUT eliminates this voltage error. Figure 1
illustrates this Kelvin-Sense connection method. Note that
the voltage drop across the external PCB traces adds to the
dropout voltage of the regulator. The SENSE pin input bias
current depends on the selected output voltage. SENSE
pin input current varies from 50µA typically at V
to 300µA typically at V
P
) of PCB traces between the regulator and the load cause
OUT
= 1.8V.
IN
-V
OUT
LT3071
differential
OUT
= 0.8V
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