ncp5383 ON Semiconductor, ncp5383 Datasheet
ncp5383
Available stocks
Related parts for ncp5383
ncp5383 Summary of contents
Page 1
... Phase Buck Controller with Integrated Gate Drivers and AVP The NCP5383 is a two phase buck controller used in low voltage, high current power supplies. Dual-edge pulse-width modulation (PWM) combined with inductor current sensing and adaptive voltage positioning (AVP) reduces system cost by providing the fastest initial response to transient loads thereby requiring less bulk and ceramic output capacitors to satisfy transient load-line requirements ...
Page 2
... V AGND 4 6 COMP Droop Amplifier DRP 0 CS1 - 10 CSN - 11 + CS2 1 R OSC OSCILLATOR I LIM NCP5383 FAULT Fault Logic UVLO + - + Figure 1. Simplified Block Diagram http://onsemi.com 2 23 BST1 22 TG1 21 SWN1 Gate Driver CCP 19 BG1 20 PGND1 ...
Page 3
... R 1 OSC 2 I LIM core COMP DRP 9 CS1 10 CSN 11 CS2 Figure 2. Typical Application Schematic NCP5383 12 V NCP5383 CCP BST1 23 TG1 22 SWN1 21 BG1 19 PGND1 20 BST2 13 14 TG2 SWN2 15 BG2 17 PGND2 AGND http://onsemi.com ...
Page 4
... PG PowerGood output. Open drain type output with internal delays. The output is latched low 75 NCP5383 Description pin. To guarantee correct operation, this pin should only be connected to the voltage OSC pin – do not connect this pin to any externally generated voltages. OSC ) that will result in output voltage droop ...
Page 5
... Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. NCP5383 Rating ) on a thermally conductive PCB in free air ...
Page 6
... Common Mode Input Voltage Range Differential Mode Input Voltage Range Input Offset Voltage CSx = CSxN = 1.00 V Current Sense Input to PWM Gain 0 mV < (CSx- CSxN) < Guaranteed by design, not tested in production. NCP5383 < 125°C; 4.5 V < V < 13 Test Conditions and COMP Pins FB = 100 pF to GND, ...
Page 7
... Enable Input Enable High Input Leakage Current EN = 3.0 V Upper Threshold V Total Hysteresis V Thermal Shutdown Thermal Trip Point TSD 1. Guaranteed by design, not tested in production. NCP5383 < 125°C; 4.5 V < V < 13 Test Conditions = 5 V, Vgs = 4 V CCP = 5 V, Vgs = 1 V CCP = 3 nF ...
Page 8
... External PG pull-up resistor R_VCC 100 ms ≤ t High – Output Leakage Current PG = 5.5 V via 1 K Upper Threshold Voltage Lower Threshold Voltage Rising Delay V Falling Delay V NCP5383 < 125°C; 4.5 V < V < 13 Test Conditions = 25° 2.0 V ilim = ...
Page 9
... JUNCTION TEMPERATURE (°C) J Figure 5. Soft-Start Sourcing Current vs. Temperature 10 9.5 V Increasing Voltage CC 9.0 8.5 V Decreasing Voltage CC 8.0 7.5 7 JUNCTION TEMPERATURE (°C) J Figure 7. V UVLO Threshold Voltage vs. CC Temperature NCP5383 TYPICAL CHARACTERISTICS 5 24.9 k OSC 4.5 4.0 3.5 3.0 100 125 0 25 Figure 4. UVLO Threshold Voltage vs. 10.8 10.7 10.6 10.5 10.4 10 400 kHz SW 10.2 ...
Page 10
... Enable Decreasing Voltage 0.7 0.6 0 JUNCTION TEMPERATURE (°C) J Figure 9. Enable Threshold Voltage vs. Temperature 804 802 800 798 796 0 Figure 11. Reference Voltage vs. Temperature NCP5383 TYPICAL CHARACTERISTICS 1.980 1.975 1.970 1.965 1.960 1.955 1.950 100 125 Figure 10 100 T , JUNCTION TEMPERATURE (°C) J http://onsemi ...
Page 11
... Figure 12 Sustaining Load Figure 14. UVLO Stop Figure 16. Soft Start Sequence http://onsemi.com NCP5383 Figure 13. UVLO Start Figure 15. Power-up Waveforms Figure 17. Power-down Waveforms 11 ...
Page 12
... The outputs will remain disabled until the V removed and re-applied, or the ENABLE input is brought low and then high. Power Good Monitor NCP5383 has a power good monitor set at 125% of Vfb or 75% of Vfb for upper and lower thresholds respectively open drain type output. /V ...
Page 13
... DCR values can be used, however current sharing accuracy and droop accuracy decrease as DCR decreases. Inductor Current Sense Compensation The NCP5383 uses the inductor current sensing method. This method uses an RC filter to cancel out the inductance of the inductor and recover the voltage that is the result of the current flowing through the inductor's DCR ...
Page 14
... Figure 20. Thermal Shutdown The NCP5383 also provides Thermal Shutdown (TSD) for added protection. The TSD circuit monitors the die temperature and turns off the top and bottom gate drivers if an over temperature condition is detected. The internal soft-start capacitor is also discharged. This is a latched state and requires a power cycle to reset ...
Page 15
... FROM TERMINAL. 4. COPLANARITY APPLIES TO THE EXPOSED PAD AS WELL AS THE TERMINALS. MILLIMETERS DIM MIN MAX A 0.80 1.00 A1 0.00 0.05 A2 0.60 0.80 A3 0.20 REF b 0.23 0.28 D 4.00 BSC D2 2.70 2.90 E 4.00 BSC E2 2.70 2.90 e 0.50 BSC L 0.35 0.45 ON Semiconductor Website: www.onsemi.com Order Literature: http://www.onsemi.com/orderlit For additional information, please contact your loca Sales Representative NCP5383/D ...