ncp5306dw ON Semiconductor, ncp5306dw Datasheet - Page 13

• Manufacturer Part Number: ncp5306dw
• Description: Threephase Vrm 9.0 Buck Controller
• Manufacturer: ON Semiconductor

Inductive Current Sensing
inductor as shown in Figure 16. In the diagram, L is the output
inductance and R
compensate the current sense signal, the values of R
C
is met, the current sense signal will be the same shape as the
inductor current and the voltage signal at CSx will represent
the instantaneous value of inductor current. Also, the circuit
can be analyzed as if a sense resistor of value R
inductive sensing, tolerances and temperature effects should
be considered. Cores with a low permeability material or a
large gap will usually have minimal inductance change with
temperature and load. Copper magnet wire has a
temperature coefficient of 0.39% per °C. The increase in
winding resistance at higher temperatures should be
considered when setting the OCSET threshold. If a more
accurate current sense is required than inductive sensing can
provide, current can be sensed through a resistor as shown
in Figure 14.
Current Sharing Accuracy
current can be used as part of the current sense resistance
depending on where the current sense signal is picked off.
For accurate current sharing, the current sense inputs should
sense the current at relatively the same point for each phase
and the connection to the CS
no phase is favored. In some cases, especially with inductive
sensing, resistance of the PCB can be useful for increasing
the current sense resistance. The total current sense
resistance used for calculations must include any PCB trace
resistance between the CSx input and the CS
carries inductor current.
value of the current sense component will determine the
CSx
For lossless sensing, current can be sensed across the
When choosing or designing inductors for use with
Printed circuit board (PCB) traces that carry inductor
Current Sense Amplifier (CSA) input mismatch and the
are chosen so that L/R
Figure 16. Enhanced V
(V
SWNODE
CORE
V
L
OUT
is the inherent inductor resistance. To
)
+
L
REF
RLx
Lx
= R
pin should be made so that
2
CSx
+
Control Employing Lossless Inductive Current Sensing and Internal Ramp
R
C
CSx
AMP
⋅ C
C
CSx
CSx
. If this criteria
REF
L
was used.
input that
x = 1, 2 or 3
CSx
CS
V
COMP
FB
CSx
http://onsemi.com
REF
DAC
and
Out
“Fast−Feedback”
Connection
13
+
−
CSA
Internal Ramp
accuracy of the current sharing between phases. The worst
case CSA input mismatch is ±10 mV and will typically be
within 4.0 mV. The difference in peak currents between
phases will be the CSA input mismatch divided by the
current sense resistance. If all current sense components are
of equal resistance, a 3.0 mV mismatch with a 2.0 mΩ sense
resistance will produce a 1.5 A difference in current between
phases.
External Ramp Size and Current Sensing
sense time constant. Typically, the current sense R
time constant should be equal to or slightly slower than the
inductor’s time constant. If RC is chosen to be smaller
(faster) than L/R
sensing signal will be scaled larger than the DC portion. This
will provide a larger steady−state ramp, but circuit
performance will be affected and must be evaluated
carefully. The current signal will overshoot during transients
and settle at the rate determined by R
eventually settle to the correct DC level, but the error will
decay with the time constant of R
excessive, it will affect transient response, adaptive
positioning and current limit. During a positive current
transient, the COMP pin will be required to undershoot in
response to the current signal in order to maintain the output
voltage. Similarly, the V
will produce too much transient droop in the output voltage.
The single−phase pulse−by−pulse overcurrent protection
will trip earlier than it would if compensated correctly and
hiccup−mode current limit will have a lower threshold for
fast rising step loads than for slowly rising output currents.
current sense signal and the actual inductor current during a
positive step in load current with values of L = 500 nH, R
= 1.6 mΩ, R
current signal compensation would require R
−
+
E.A.
The internal ramp allows flexibility in setting the current
The waveforms in Figure 17 show a simulation of the
COx
Start−Up
Channel
Offset
CSx
= 20 kΩ and C
L
, the AC or transient portion of the current
DRP
+
−
CSx
COMP
PWM
signal will overshoot which
= .01 μF. In this case, ideal
CSx
⋅ C
To F/F
Reset
CSx
CSx
CSx
. If this error is
⋅ C
CSx
to be 31 kΩ.
CSx
. It will
⋅ C
CSx
L