lt3517 Linear Technology Corporation, lt3517 Datasheet - Page 8

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lt3517

Manufacturer Part Number
lt3517
Description
Full-featured Led Driver With 1.5a Switch Current
Manufacturer
Linear Technology Corporation
Datasheet

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OPERATION
LT3517
The LT3517 is a constant frequency, current mode regula-
tor with an internal power switch. Operation can be best
understood by referring to the Block Diagram in Figure 1. At
the start of each oscillator cycle, the SR latch is set, which
turns on the Q1 power switch. A voltage proportional to
the switch current is added to a stabilizing ramp and the
resulting sum is fed into the positive terminal of the PWM
comparator, A4. When this voltage exceeds the level at the
negative input of A4, the SR latch is reset, turning off the
power switch. The level at the negative input of A4 is set
by the error amplifi er A3. A3 has two inputs, one from the
voltage feedback loop and the other one from the current
loop. Whichever feedback input is lower takes precedence,
and forces the converter into either constant-current or
constant-voltage mode. The LT3517 is designed to transi-
tion cleanly between these two modes of operation. The
current sense amplifi er senses the voltage across R
and provides a pre-gain to amplifi er A1. The output of A1
is simply an amplifi ed version of the difference between
the voltage across R
or 100mV. In this manner, the error amplifi er sets the
correct peak switch current level to regulate the current
APPLICATIONS INFORMATION
8
Dimming Control
There are two methods to control the current source for
dimming using the LT3517. The fi rst method uses the
PWM pin to modulate the current source between zero
and full current to achieve a precisely programmed aver-
age current. To make this method of current control more
accurate, the switch demand current is stored on the V
node during the quiescent phase. This feature minimizes
recovery time when the PWM signal goes high. To further
improve the recovery time, a disconnect switch is used in
the LED current path to prevent the output capacitor from
discharging in the PWM signal low phase. The minimum
PWM on or off time will depend on the choice of operating
frequency through R
the SYNC function, the SYNC and PWM signals must have
the aligned rising edges to achieve the optimized high PWM
dimming ratio. For best current accuracy, the minimum
T
SENSE
input pin or SYNC pin. When using
and the lower of V
CTRL
SENSE
/10
C
PWM low or high time should be at least four switching
cycles (2μs for f
determined by the system and is unlikely to be longer than
12ms. The maximum PWM dimming ratio (PWM
be calculated from the maximum PWM period (t
the minimum PWM pulse width (t
Example:
t
PWM
The second method of dimming control uses the CTRL
pin to linearly adjust the current sense threshold during
the PWM high state. When the CTRL pin voltage is less
through R
more current is delivered to the output; if it decreases,
less current is delivered. The current regulated in R
can be adjusted by changing the input voltage V
The current sense amplifi er provides rail-to-rail current
sense operation. The FB voltage loop is implemented by
the amplifi er A2. When the voltage loop dominates, the
error amplifi er and the amplifi er A2 regulate the FB pin to
1.01V (constant-voltage mode).
Dimming of the LED array is accomplished by pulsing the
LED current using the PWM pin. When the PWM pin is
low, switching is disabled and the error amplifi er is turned
off so that it does not drive the V
loads on the V
of the V
capacitor. This feature reduces transient recovery time.
When the PWM input again transitions high, the demand
current for the switch returns to the value just before
PWM last transitioned low. To further reduce transient
recovery time, an external PMOS is used to disconnect
the LED array current loop when PWM is low, stopping
C
MAX
FILT
PWM
= 10ms, t
from discharging.
RATIO
C
RATIO
pin will be saved on the external compensation
SENSE
= 10ms/2μs = 5000:1
C
=
MIN
. If the error amplifi er’s output increases,
pin are disabled so that the charge state
SW
t
t
MAX
MIN
= 2μs (f
= 2MHz). Maximum PWM period is
SW
= 2MHz)
C
MIN
pin. Also, all internal
) as follows:
RATIO
MAX
SENSE
) and
CTRL
) can
3517f
(1)
.

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