a8438eej-t Allegro MicroSystems, Inc., a8438eej-t Datasheet - Page 13

• Manufacturer Part Number: a8438eej-t
• Description: A8438 Photoflash Capacitor Charger With Igbt Driver
• Manufacturer: Allegro MicroSystems, Inc.

A8438
Transformer Design
Turns Ratio.
(Secondary:Primary) should be chosen based on the following
formula:
where:
For example, if V
be the case when two high voltage diodes were in series), and the
desired V
In a worst case, when V
at their maximum tolerance limit, N will be higher. Taking V
= 5.5 V, V
the worst case condition, N can be determined to be 9.5.
In practice, always choose a turns ratio that is higher than the
calculated value to give some safety margin. In the worst case
example, a minimum turns ratio of N = 10 is recommended.
Primary Inductance
t
As a loose guideline when choosing the primary inductance,
Figure 4. Typical circuit for photoflash application. Configured for I
OFF(min)
V
V
V
40 (V) is the rated voltage for the internal MOSFET switch,
representing the maximum allowable reflected voltage from the
output to the SW pin.
OUT
D_Drop
BATT
V
BIAS
(V) is the required output voltage level,
, of 300 ns, to ensure correct SW node voltage sensing.
(V) is the transformer battery supply, and
3.0 to 5.5 V
OUT
D_Drop
R5
100 k
R6
10 k
(V) is the forward voltage drop of the output diode(s),
The minimum transformer turns ratio, N,
is 320 V, then the turns ratio should be at least 8.9.
= 2 V, and V
R7
10 k
BATT
10
R4
k
N
. The A8438 has a minimum switch off-time,
ILIM
DONE
CHARGE
TRIGGER
is 3.5 V and V
VIN
BATT
V
OUT
40
is highest and V
OUT
GND
C1
0.1 μF
V
IGBTDRV
V
Two Alkaline/NiMH/NiCAD or one Li +
V
A8438
= 320 V × 102 % = 326.4 V as
BATT
D _ Drop
BATT
SW
D_Drop
1.5 to 5.5 V
FB
C2
4.7 μF
To IGBT Gate
is 1.7 V (which could
D_Drop
T1
Photoflash Capacitor Charger with IGBT Driver
Applications Information
and V
150 k
150 k
1.2 k
R1
R2
R3
D1
OUT
SWLIM
(2)
BATT
V
COUT
100 μF
330 V
OUT
are
of 2.0 A.
L
Ideally, the charging time is not affected by transformer primary
inductance. In practice, however, it is recommended that a
primary inductance be chosen between 6 μH and 20 μH. When
L
higher frequency, which increases switching loss proportionally.
This leads to lower efficiency and longer charging time. When
L
be dramatically increased to handle the required power density,
and the series resistances are usually higher. A design that is
optimized to achieve a small footprint solution would have an
L
secondary capacitance, and minimized primary and secondary
series resistance. Please refer to the table Recommended
Components for more information.
Leakage Inductance and Secondary Capacitance.
former design should minimize the leakage inductance to ensure
the turn-off voltage spike at the SW node does not exceed the
40 V limit. An achievable minimum leakage inductance for this
application, however, is usually compromised by an increase in
parasitic capacitance. Furthermore, the transformer secondary
capacitance should be minimized. Any secondary capacitance is
multiplied by N
initial current swings when the switch turns on, and to reduced
efficiency.
Primary
Primary
Primary
Primary
(μH), use the following formula:
is much lower than 6 μH, the converter operates at
is greater than 20 μH, the rating of the transformer must
of 7 to 14 μH, with minimized leakage inductance and
Symbol
R1, R2
R4, R5
R6, R7
C1
C2
D1
T1
R3
L
2
Primary
when reflected to the primary, leading to high
0.1 μF, X5R or X7R, 10 V
4.7 μF, X5R or X7R, 10 V
Fairchild Semiconductor BAV23S
(dual diode connected in series)
TDK LDT565630T-041,
L
1206 resistors, 1 %
0603 resistor, 1 %
Pull-up resistors
Pull-down resistors
Primary
300
115 Northeast Cutoff, Box 15036
Allegro MicroSystems, Inc.
Worcester, Massachusetts 01615-0036 [phone]
www.allegromicro.com
N
= 4.7 μH, N = 10.2
10
I
SWLIM
9
Rating
V
OUT
.
The trans-
(3)
13