ncp3120 ON Semiconductor, ncp3120 Datasheet
ncp3120
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ncp3120 Summary of contents
Page 1
... The NCP3120 is a dual buck converter designed for low voltage applications requiring high efficiency. This device is capable of producing an output voltage as low as 0.8 V. The NCP3120 provides dual 2.0 A switching regulators with an adjustable 200 kHz - 750 kHz switching frequency. The switching frequency is set by an external resistor ...
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... SEQ1 Power EN 1 Sequencing 1 Power EN 2 Sequencing 2 SEQ 2 SS2 Soft Start & Tracking Control (MUX2) TRACK 2 COMP 2 Error Amplifier EOTA ref NCP3120 0 .1. ref pg 1 Delay R PWM FB1 10 u OSCILLATOR 0. 5V Overload Protection SHDN 1 SHDN2 ...
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... Soft-start/stop control input for Channel 1. An internal current source charges an external capacitor connected to this pin to set the soft-start time. 30 GND1 Power ground for Channel 1. Exposed Pad (GND) The exposed pad at the bottom of the package is the electrical ground connection of the NCP3120. This node must be tied to ground. NCP3120 Description http://onsemi.com 3 ...
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... Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability 100 x 100 mm PCB with two solid 1 oz ground planes. qJA 2. The maximum package power dissipation limit must not be exceeded * (max qJA NCP3120 Symbol Min V -0.3 VIN V -0.3 AVIN V -0.7 SW -5V for < -0.3 ...
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... Unity Gain Bandwidth Output Sink Current Output Source Current Input Bias Current Comp Pin Operating Voltage Range SOFT-START Soft-Start Period Soft-Start Voltage Range Soft-Start Current Source NCP3120 (-40°C < T < 125° 25°C for typical values Conditions 1 ...
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... PG Leakage Current ENABLE/POWER SEQUENCING Enable Internal Pullup Current Sequence Internal Pulldown Current Enable Threshold High Sequence Threshold Low THERMAL SHUTDOWN Overtemperature Trip Point Hysteresis 3. DC value. 4. Guaranteed by design. NCP3120 (-40°C < T < 125° 25°C for typical values Conditions V = 0.6 V TRACK ...
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... TEMPERATURE (°C) Figure 3. Feedback Voltage vs. Temperature 216 211 206 RT = open 201 196 191 186 -50 - TEMPERATURE (°C) Figure 5. Low Switching Frequency vs. Temperature NCP3120 850 830 810 790 770 750 730 75 100 125 -50 -25 Figure 4. High Switching Frequency vs ...
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... TEMPERATURE (°C) Figure 7. Shutdown Supply Current vs. Temperature 4.50 4.45 4.40 4.35 4.30 4.25 4.20 -50 - TEMPERATURE (°C) Figure 9. UVLO - Rising Threshold vs. Temperature 4.20 4.15 4.10 4.05 4.00 3.95 3.90 -50 - TEMPERATURE (°C) Figure 11. UVLO - Falling Threshold vs. Temperature NCP3120 0.40 0.35 0.30 0.25 0.20 0.15 75 100 125 -50 -25 Figure 8. R 3.3 3.2 3.1 3.0 2.9 2.8 2.7 75 100 125 -50 -25 Figure 10. Current Limit vs. Temperature 9.9 9.4 8.9 8.4 7.9 7.4 6.9 75 100 125 ...
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... TRACK -5 -10 -15 -50 - TEMPERATURE (°C) Figure 15. Tracking Voltage Offset vs. Temperature 0.83 0.81 0.79 0.77 0.75 0.73 0.71 -50 - TEMPERATURE (°C) Figure 17. Power Good Feedback Threshold vs. Temperature NCP3120 100 125 -50 -25 Figure 14. Power Good Hysteresis vs 100 ...
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... Vds (V) Figure 21. Power Good Current vs. Drain-to-Source Voltage 3.40 3.38 3.36 3. out 3.32 3.30 3.28 3.26 3.24 3.22 3. Vin (V) Figure 23. NCP3120 Line Regulation NCP3120 6.0 5.5 5.0 4.5 4.0 3.5 3.0 2.5 2.0 75 100 125 -50 -25 Figure 20. EN Internal Pull-up Current vs 3.5 4.0 4.5 5.0 -50 -25 Figure 22. SEQ Internal Pull-down Current vs. ...
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... Figure 27. NCP3120 Efficiency 3.3 V, 255C in out 0.50 0.45 0.40 0.35 0.30 0.25 0.20 4 NCP3120 220 kHz 750 kHz 1.5 2.0 0 Figure 26. NCP3120 Efficiency 220 kHz 750 kHz 75 1.5 2.0 0 Figure 28. NCP3120 Efficiency Vin = AVin (V) Figure 29. R vs. Input Voltage DS(on) http://onsemi ...
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... SEQ pin have to be pulled high or connected directly to V (max 8 V). in Note: For proper operation of the NCP3120 circuit, no voltage may be pulled high on the output pins. The output capacitors should be discharged. If this condition is not observed when NCP3120 is enabled, the regulator does not start switching ...
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... The current through each channel is continuously monitored. The current limit is set to allow Thermal Shutdown The NCP3120 has a thermal shutdown feature to protect the device from overheating when the die temperature exceeds 160°C (typically). If the chip temperature exceeds the overtemperature shutdown trip point, the fault signal is activated ...
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... 1 out 2 A NCP3120 APPLICATION & DESIGN INFORMATION The maximum current in the inductor while operating in the continuous current mode is defined as the load current plus one half of the DI The inductance value can be calculated by: Therefore, the inductor peak current, I calculated by: where ...
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... The peak reverse voltage is equal to the maximum input voltage. The peak conducting current is clamped by the current limit of the NCP3120. Use of Schottky barrier diodes reduces diode reverse recovery input current spikes. For switching regulators operating at low duty cycles beneficial to use rectifying diodes with somewhat higher RMS current ratings (thus lower forward voltages) ...
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... R [kW NCP3120 supplies the current to the load in DCM or during load transient and filters the output voltage ripple. For low output ripple voltage and good stability, low ESR output capacitors are recommended. The inductor ripple current acting against the ESR of the output capacitor is the major contributor to the output ripple voltage ...
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... In that case, the signal processors require multiple power supplies generating different voltage levels for core and I/O peripherals over time. NCP3120 offers ratiometric sequencing, sequential sequencing and tracking sections to manage the output voltages behavior during start-up and power-down. Basically, the DSP, FPGA, and PLD ...
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... For proper operation in this mode, using a common soft-start capacitor for both channels is not recommended. AVIN C13 C3 R13 C12 SW1 PG1 VIN PG2 VIN EN1 VIN SEQ1 NCP3120 VIN EN2 VIN SEQ2 VIN TRACK1 SW2 TRACK2 C22 GND GND R23 C23 GND http://onsemi ...
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... V FB1 (min) VOUT1 & VOUT2 90% V FB2 (min) PG1 & PG2 Figure 34. Typical Behavior of Ratiometric Sequencing Mode Figure 35. Ratiometric Mode - Power-up Figure 37. Ratiometric Mode - Start of OLM NCP3120 4V Figure 36. Ratiometric Mode - Power-down Figure 38. Ratiometric Mode - End of OLM http://onsemi.com 19 0.8V hyst + delay ...
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... In sequential sequencing mode, the second output voltage starts ramping when the first output voltage is already settled and its power good signal is set. Figure 39 shows the NCP3120's configuration and standard waveforms. The rising slope of both voltages can be selected independently by the soft-start capacitors' values (C1, C2). When the ...
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... Vout1 Vout2 Vout3 Vout4 Figure 40. Simplified Drawing of Daisy-chained NCP3120's When the first voltage rail has reached a specific voltage level, the next voltage rail is enabled and its rise is monitored until it has reached the power good trip point. At this point, the next voltage rail is enabled. This continues until all NCP3120 soft-start ramp-up of the supply ...
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... EN1 & SEQ2 SS1 90 (min) VOUT1 Internal PG1 90 VOUT2 (min) Internal PG2 SEQ1 & EN2 SS2 VOUT1 & VOUT2 PG1 PG2 Figure 41. Typical Behavior of Sequential Mode NCP3120 0.8V 4V 0.8V 4V http://onsemi.com 22 0.8V 10 (min) 10 (min) 0.8V ...
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... Figure 42. Sequential Mode - Power-up Figure 44. Sequential Mode - Power-down Figure 45. Daisy Chain of Four Outputs NCP3120 Figure 43. Sequential Mode - Power-down Figure 46. OLM of the 3rd Output in Daisy http://onsemi.com 23 Chain ...
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... Track pins must be tied high in the normal operation (except in the tracking mode). The output voltage during tracking can be calculated with the following equation OUT C3 C13 R8 Cmaster SW1 VIN VIN VIN NCP3120 VIN VIN VIN SW2 R11 GND GND R7 C4 GND C master Figure 47. Tracking Configuration http://onsemi.com ...
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... EN1/SEQ1 & EN2/SEQ2 SS1 0.8V 90 (min) VOUT1 & SS2 TRACK2 0.8V 90 (min) VOUT1 2 90 & VOUT2 (min) PG1 PG2 Figure 48. Typical Behavior of Tracking Configuration NCP3120 4V http://onsemi.com 25 0.8V 0.8V hyst+delay hyst+delay ...
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... After the overload condition ends, the slave channel voltage remains low. If the slave channel should rise when the OLM disappears, the configuration of the enable and soft-start pins shown in Figure 53 must be used. NCP3120 Figure 50. Tracking Mode - Power-down Figure 52. Tracking Mode of Four Outputs - Power-down ...
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... Figure 56. Master Voltage - Start of Augmented OLM Note: If the overload conditions are detected on the master channel only or on both channels together (master + slave), NCP3120 Figure 55. Master Voltage - End of OLM Figure 57. Master Voltage - End of Augmented OLM both output voltages increase when the overload conditions are released ...
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... PG1 PG2 EN1 NCP3120 SEQ1 EN2 SEQ2 TRACK1 TRACK2 R9 GND GND R7 C4 GND C1 C16 R17 R21 C6 PG1 PG2 EN1 NCP3120 SEQ1 EN2 SEQ2 TRACK1 TRACK2 R18 GND GND R16 C2 GND Figure 58. Mixed Mode, Configuration A http://onsemi.com 28 VIN GND SW1 L1 VIN ...
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... Figure 59. Mixed Mode of Four Outputs - Power-up NCP3120 Figure 60. Mixed Mode of Four Outputs - Power-down http://onsemi.com 29 ...
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... TRACK TRACK Out4 Out2 EN EN OUT OUT SEQ SEQ NCP3120 NCP3120 TRACK TRACK VOUT1 VOUT2 VOUT3 VOUT4 VOUT5 VOUT6 Figure 61. Mixed Mode, Configuration B Figure 63. Mixed Mode of Six Outputs - http://onsemi.com 30 Out5 EN OUT SEQ NCP3120 TRACK Out6 EN OUT SEQ NCP3120 TRACK Power-down ...
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... Enable Disable EN2 RT VOUT1 VOUT2 NCP3120 AVIN C13 C3 R13 C12 SW1 PG1 VIN PG2 VIN EN1 VIN SEQ1 NCP3120 VIN EN2 VIN SEQ2 VIN TRACK1 SW2 TRACK2 C22 GND GND R23 C23 GND Figure 64. Normal Operation Configuration http://onsemi.com 31 VIN GND ...
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... EN1/SEQ1 EN2/SEQ2 SS1 0.8V SS2 90%VFB (min) VOUT1 90%VFB (min) VOUT2 PG1 PG2 Figure 65. Typical Application Behavior NCP3120 4V 0.8V 4V http://onsemi.com 32 0.8V 0.8V hyst + delay hyst + delay ...
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... Parallel Operation Parallel operation of NCP3120 circuit(s) has several advantages. One of the most important aspects is the capability to deliver a double output current. The major advantage is a reduced output voltage ripple in case of out-of-phase synchronization. The standard configuration is shown in Figure 60. R_TRACK PG1 Enable PG2 ...
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... NCP3120 Figure 67. Parallel Operation of Both Outputs http://onsemi.com 34 ...
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... NCP3120 for specific requirements, the COMPCALC design tool is available from ON Semiconductor at no charge. Visit http://www.onsemi.com/pub/Collateral/COMPCALC.ZIP to download the self-extracting program for NCP3120 loop compensation design assistance. There is an Excel design tool for component selection. This design tool is available at http://www.onsemi.com/. L11 [mH] ...
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... Layout Diagram NCP3120 Figure 68. Typical Layout Diagram http://onsemi.com 36 ...
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... EN2 SEQ2 TRACK1 TRACK2 NCP3120 C13 22n C15 NU R13 C3 4.7k RVIN 100n 100 C12 100n SW1 VIN VIN VIN NCP3120 VIN VIN VIN SW2 C22 100n GND R23 4.7k C25 NU C23 22n GND Figure 69. Typical Circuit Diagram http://onsemi.com 37 VIN GND OUT1 L11 ...
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... MBRS240LT3 ORDERING INFORMATION Device NCP3120MNTXG †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specification Brochure, BRD8011/D. NCP3120 BOM of the NCP3120 – Evaluation Board v2.11 Scale Ref. Designator Chip NCP3120 Resistors 1206 ...
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... A3 0.200 REF b 0.180 0.250 0.300 D 5.00 BSC D2 2.950 3.100 3.250 E 5.00 BSC E2 2.950 3.100 3.250 e 0.500 BSC K 0.200 --- --- L 0.300 0.400 0.500 5.30 3.20 3.20 5. 0.50 PITCH ON Semiconductor Website: www.onsemi.com Order Literature: http://www.onsemi.com/orderlit For additional information, please contact your local Sales Representative NCP3120/D ...