ncl30051 ON Semiconductor, ncl30051 Datasheet - Page 10

• Manufacturer Part Number: ncl30051
• Description: Ncl30051 Product Preview Two Stage Pfc And Resonant Half Bridge Controller Combo For Led Lighting
• Manufacturer: ON Semiconductor

mode V
calculate the on time for a given C
Substituting t
rearranging Equation 4 provides a maximum value for C
where, V
3.0 V.
PFC Compensation
internal pull down transistor when the supply voltage has
not reached V
This ensures a soft−start sequence once the PFC is enabled
and eliminates output voltage overshoot during on/off
tests. Once the error amplifier is enabled the output of the
error amplifier charges quickly to the minimum clamp
voltage.
Off Time Control
voltage and it is adjusted every cycle to allow the inductor
current to reach zero before the next switch cycle begins.
The inductor is demagnetized once its current reaches zero.
Once the inductor is demagnetized the drain voltage of the
PFC switch begins to drop. The inductor demagnetization
is detected by sensing the voltage across the inductor using
an auxiliary winding. This winding is commonly known as
a zero crossing detector (ZCD) winding. This winding
provides a scaled version of the inductor voltage. Figure 6
shows the ZCD winding arrangement.
the PFC switch is on. The PZCD voltage is positive while
the PFC switch is off and current is flowing through the
inductor. The PZCD voltage drops to and rings around zero
volts once the inductor is demagnetized. Once a negative
transition is detected in the PZCD pin the next switch cycle
commences. A positive transition (corresponding to the
PFC switch turn off) arms the ZCD detector to prevent false
triggering. The arming of the ZCD detector is typically
2.1 V (V
1.5 V (V
The output of the error amplifier is pulled low with an
The PFC off time varies with the instantaneous line
A negative voltage appears on the ZCD winding while
PControl
Figure 6. ZCD Winding Implementation
PCT(MAX)
PZCD
PZCD
C
CC(on)
on
decreasing).
T
increasing) and the triggering is typically
t
is at its maximum. Equation 3 is used to
on(MAX)
w
in Equation 2 with Equation 3 and
, is the maximum PCT voltage, typically
h @ V
or if there is a PFC undervoltage fault.
2 @ P
+
ac(RMS)
C
out
T
@ L @ I
@ V
I
2
PCT(C)
@ V
PCT(MAX)
T
.
PCT(C)
PCT(MAX)
http://onsemi.com
(eq. 3)
(eq. 4)
T
.
10
diode. A resistor in series with the ZCD pin is required to
limit the current into the PZCD pin. The zener diode
prevents the voltage from exceeding the 10 V clamp or
going below ground. Figure 7 shows typical ZCD
waveforms.
PFC switch. A watchdog timer enables the PFC controller
if no switch pulses are detected for a period of 180 ms
(typical). The watchdog is also useful while operating at
light load because the amplitude of the ZCD signal may be
very small to cross the ZCD thresholds. The watchdog
timer is reset at the beginning of a PFC drive pulse and in
a PFC undervoltage fault.
PZCD pin is above V
voltage on the PZCD pin drops below V
the watchdog timer allows the PFC to be disabled by
pulling up on the PZCD pin. Care should be taken to limit
the current into the PZCD pin if the pull up voltage exceeds
the internal 10 V zener clamp.
PFC Compensation
output voltage, V
signal to an internal 2.5 V reference. As shown in Figure 28
a resistor divider from the PFC output voltage consisting of
R1 and R2 generates the PFC feedback signal.
input. The internal 2.5 V reference, V
amplifier non−inverting input. The reference is trimmed
during manufacturing to achieve an accuracy of ±3.2%.
Figure 5 shows the PFC error amplifier and sensing
PFC Switch
Voltage of
The PZCD pin is internally clamped to 10 V with a zener
During startup there are no ZCD transitions to enable the
The watchdog timer is disabled if the voltage on the
A transconductance error amplifier regulates the PFC
The feedback signal is applied to the amplifier inverting
V
PDRV
Drain
PZCD
R2
R1
Figure 7. ZCD Winding Waveforms
V
Figure 8. PFC Voltage Sensing
PFC
PFB
PFC
, by comparing the PFC feedback
ZCD(high)
I
PFB
. It is re−enabled once the
−
+
−
+
V
PFC Error
Amplifier
PREF
PREF
ZCD(low)
, is applied to the
. Disabling
10 V
V
V
0 V
ZCD(high)
ZCD(low)