a4935 Allegro MicroSystems, Inc., a4935 Datasheet - Page 17

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a4935

Manufacturer Part Number
a4935
Description
Automotive 3-phase Mosfet Driver
Manufacturer
Allegro MicroSystems, Inc.
Datasheet

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A4935
with either 2-phase or 3-phase excitation. When using fast decay,
a PWM duty cycle of 50% results in zero effective motor torque.
A duty cycle of less than 50% causes negative effective torque,
and greater than 50% causes positive effective torque.
To reduce power dissipation in the external FETs, the A4935 can
be instructed to turn on the appropriate low-side and high-side
drives during the load current recirculation PWM off-cycle. This
synchronous rectification allows current to flow through the
selected FETs, rather than the source-drain body diode, during
the decay time. The body diodes of the recirculating power FETs
conduct only during the dead time that occurs at each PWM
transition.
Dead Time
To prevent cross-conduction (shoot through) in any phase of
the power FET bridge, it is necessary to have a dead time delay,
t
mentary turn-on event. The potential for cross-conduction occurs
when any complementary high-side and low-side pair of FETs are
switched at the same time; for example, when using synchronous
rectification or after a bootstrap capacitor charging cycle. In the
A4935, the dead time for all three phases is set by a single dead-
time resistor (R
For R
nal value of t
where R
of R
The I
If the dead time is to be generated externally, for example by
the PWM output of a microcontroller, then connect the RDEAD
pin to the AGND pin to set the internally-generated dead time to
zero. Note that this configuration can allow cross-conduction, and
appropriate care should be taken, as described in the Cross-Con-
duction section. The maximum internally-generated dead time,
6 μs typical, can be set by connecting the RDEAD and VDD pins.
DEAD
DEAD
DEAD
DEAD
, between a high- or low-side turn-off and the next comple-
DEAD
t
DEAD
between 6 and 60 kΩ, which are shown in figure 3.
current can be estimated by:
values between 3 kΩ and 240 kΩ, at 25°C the nomi-
DEAD
is in kΩ. Greatest accuracy is obtained for values
(nom)
DEAD
in ns can be approximated by:
) between the RDEAD and AGND pins.
=
I
50 +
DEAD
=
1.2 + (200 / R
R
DEAD
1.2
7200
.
DEAD
)
Automotive 3-Phase MOSFET Driver
,
(1)
(2)
The choice of power FET and external series gate resistance
determine the selection of the dead-time resistor, R
dead time should be long enough to ensure that one FET in a
phase has stopped conducting before the complementary FET
starts conducting. This should also take into account the tolerance
and variation of the FET gate capacitance, the series gate resis-
tance, and the on-resistance of the A4935 internal drives.
Internally-generated dead time will be present only if the on-com-
mand for one FET occurs within t
for its complementary FET. In the case where one side of a phase
drive is permanently off, for example when using diode rectifica-
tion with slow decay, then the dead time will not occur. In this
case the gate drive will turn on within the specified propagation
delay after the corresponding phase input goes high. (Refer to the
Gate Drive Timing diagrams.)
Fault Blank Time
To avoid false short fault detection, the output from the VDS
monitor for any FET is ignored when that FET is off and for a
period of time after it is turned on. This period of time is the fault
blank time. Its length is the dead time, t
period of time that compensates for the delay in the V
tors. This additional delay is typically 300 to 600 ns. When t
Figure 3. Dead time versus R
1.8
1.6
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0.0
0
10
20
DEAD
115 Northeast Cutoff
1.508.853.5000; www.allegromicro.com
Allegro MicroSystems, Inc.
Worcester, Massachusetts 01615-0036 U.S.A.
30
R
DEAD
DEAD
(kΩ)
40
DEAD
after the off-command
50
, plus an additional
60
DEAD
DS
. The
moni-
70
DEAD
17

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