a4930 Allegro MicroSystems, Inc., a4930 Datasheet
a4930
Related parts for a4930
a4930 Summary of contents
Page 1
... MOSFETs during PWM operation. Internal circuit protection includes thermal shutdown with hysteresis, rotor lock, and dead time protection. The A4930 is supplied in a 0.90 nominal overall height × 5 mm, 28-pin QFN with exposed thermal pad, (suffix ET lead (Pb) free with 100% matte tin leadframe plating ...
Page 2
... A4930 Selection Guide Part Number A4930METTR-T 1500 pieces per 7-in. reel Absolute Maximum Ratings Characteristic Load Supply Voltage Hall Input Logic Input Voltage Range Operating Temperature Range Junction Temperature Storage Temperature Range may require derating at maximum conditions THERMAL CHARACTERISTICS Characteristic Package Thermal Resistance *Additional thermal information available on Allegro website ...
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... A4930 ELECTRICAL CHARACTERISTICS Characteristic Load Supply Voltage Range Motor Supply Current VREG5 VREG5 Current Limit VREG5 Load Regulation Control Logic Logic Input Voltage PWM Pin Input Current Other Logic Pin Input Current Gate Drive High Side Gate Drive Output Low Side Gate Drive Output ...
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... A4930 1 ELECTRICAL CHARACTERISTICS Characteristic VBB Undervoltage Lockout Enable Threshold VBB Undervoltage Lockout Hysteresis VCP Undervoltage Lockout Enable Threshold Lock Detect On-Time Lock Detect Off-Time Hall Logic Hall Input Current Common Mode Input Range AC Input Voltage Range Hall Threshold Hysteresis Width Pulse Reject Filter ...
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... If this feature is not utilized, the SS pin should be left open. Synchronous Rectification load current recirculates. The A4930 synchronous rectification feature turns on the appropriate MOSFETs during current decay, and effectively shorts out the body diodes of the low R driver ...
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... GND. A resistor connected between this pin and GND sets CDEL the level at which the A4930 switches to slow decay mode in advance of the Hall zero crossing as shown here: The resistor should 100 kΩ. If this feature is not used, the CDEL pin should be pulled ...
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... Locate the A4930 to minimize the length of the GHx/GLx/Sx traces to the power stage. • Connect the GND pins of the A4930 to the exposed pad. Use vias under the IC case to connect the exposed pad to the ground plane on the opposite face of the PCB. ...
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... A4930 Terminal List Number Name 1 VREG5 Regulator decoupling terminal 2 CLD Capacitor to set Lock Detect Time output, fan speed indicator (open drain) RD output, high for locked rotor condition (open 4 RD drain Hall input positive 6 HN Hall input negative 7 CDEL Commutation delay ...
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... A4930 Package ET 28-Pin QFN with Exposed Thermal Pad 29X 0.08 C +0.05 0.25 –0.07 +0.20 0.55 –0. Copyright ©2008, Allegro MicroSystems, Inc. The products described here are manufactured under one or more U.S. patents or U.S. patents pending. Allegro MicroSystems, Inc. reserves the right to make, from time to time, such de par tures from the detail spec tions as may be required to per- mit improvements in the per for mance, reliability, or manufacturability of its products ...