mic9130 Micrel Semiconductor, mic9130 Datasheet - Page 11

• Manufacturer Part Number: mic9130
• Description: High-voltage, High-speed Telecom Dc-to-dc Controller
• Manufacturer: Micrel Semiconductor

V
The V
a 1.21V internal bandgap reference. As V
turn-on threshold, it disables the Vcc undervoltage lockout
circuit. Once above the turn-on threshold, hysteresis prevents
the lockout circuit from disabling the IC until the V
falls below the lower threshold.
Line Undervoltage Circuit (UVLO)
The line voltage is monitored by an external resistor divider
and fed into the negative input of the line UVLO comparator.
As the comparator trip point is exceeded, the line UVLO circuit
is disabled. Hysteresis built into the comparator prevents the
circuit from toggling on an off in the presence of noise or a
high input line impedance.
The line voltage turn-on trip point is:
where: V
where: V
The MIC9130 will be disabled when the line voltage drops
back down to:
April 2005
MIC9130
CC
Undervoltage Lockout
CC
V
The line hysteresis is equal to:
V
75mV.
V
V
(
voltage is internally divided down and compared to
HYSTERESIS
V
LINE_ON
THRESHOLD
HYST
HYSTERESIS
LINE_OFF
THRESHOLD
comparator reference, typically 1.21V.
voltage
is the internal hysteresis level, typically
V
IN
=
R2
=
R1
V
V
=
THRESHOLD
LINE_ON
−
is the voltage level of the internal
V
is the hysteresis of the line input
HYST
V
UVLO
A
HYST
V
GND
CC
×
−
11
13
2
)
R1 R2
V
×
×
HYTERESIS
R2
R1 R2
R1 R2
+
R2
R2
+
+
1.21V
=
Figure 4: UVLO and Soft Start Circuits
CC
rises above the
CC
voltage
VCC
UVLO
LINE
UVLO
11
MIC9130
Enable
A low level on the enable pin turns off all the functions of the
MIC9130 and places it in a low quiescent current state. The
output driver is in a low state. When the enable pin is pulled
high, the MIC9130 goes through its normal start up sequence
including undervoltage lock out and soft start. When not used,
the pin should be connected to V
Oscillator Block
An external resistor and capacitor set the oscillator frequency.
The MIC9130 contains an internal divide-by-two circuit that
limits the maximum duty cycle at the gate drive to 50%.
The oscillator frequency for the MIC9130 is twice the output
switching frequency.
Oscillator Pin
The operation of the oscillator is shown in Figure 5. The volt-
age waveform at the OSC pin is a sawtooth whose amplitude
increases as capacitor Cosc is charged up through R
the 5V bias. When the OSC pin voltage reaches the internal
comparator upper threshold, C
zero volts by an internal MOSFET. After a brief delay, typi-
cally 75ns, the internal MOSFET is turned off and the C
charges, repeating the cycle. Figure 5 show the relationship
between the oscillator and gate drive waveforms. The delays
in the IC force the duty cycle of the gate drive signal to be
slightly less than 50% duty cycle (typically 48%).
3V, the design equations simplify to:
For V
UVLO
BIAS
t
Charging
Discharging
t
CHARGE
DISCHARGE
= 5V and a peak oscillator waveform voltage of
S
R
RESET
SET
=
0 92
≈
.
40
/Q
Q
×
×
R
C
PGND
t
t
×
15
C
OSC
t
4µA
CC
is quickly discharged to
.
5V
12
16
SS
OUT
M9999-040805
Micrel, Inc.
OSC
from
OSC