a6811ea Allegro MicroSystems, Inc., a6811ea Datasheet

a6811ea

Manufacturer Part Number

a6811ea

Description

Dabic-iv, 12-bit Serial-input, Latched Source Driver

Manufacturer

Allegro MicroSystems, Inc.

Datasheet

1.A6811EA.pdf (8 pages)

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DATA OUT

BLANKING

SUPPLY

STROBE

DATA IN

Logic Supply Voltage, V

Driver Supply Voltage, V

Continuous Output Current Range,

Input Voltage Range,

Package Power Dissipation,

Operating Temperature Range, T

Storage Temperature Range,

Caution: These CMOS devices have input

static protection (Class 2) but are still

susceptible to damage if exposed to

extremely high static electrical charges.

SERIAL

CLOCK

LOGIC

OUT

(Suffix ‘E–’) .................. -40 C to +85 C

(Suffix ‘S–’) .................. -20 C to +85 C

OUT

........................................ See Graph

............................... -55 C to +125 C

....................... -0.3 V to V

......................... -40 mA to +15 mA

BLNK

CLK

................... 7.0 V

................... 60 V

+ 0.3 V

Dwg. PP-029-5

OUT

LOAD

SUPPLY

OUT

GROUND

681 1

accompanying data latches and control circuitry with bipolar sourcing

outputs and pnp active pull downs. Designed primarily to drive

vacuum-fluorescent displays, the 60 V and -40 mA output ratings also

allow these devices to be used in many other peripheral power driver

applications. The A6811– features an increased data input rate (com-

pared with the older UCN/UCQ5811A) and a controlled output slew

rate.

microprocessor-based systems. With a 3.3 V or 5 V logic supply,

typical serial-data input rates are up to 33 MHz.

tions requiring additional drive lines. Similar devices are available as

the A6809– and A6810– (10 bits), A6812– (20 bits), and A6818– (32

bits).

sourcing up to 40 mA. The controlled output slew rate reduces electro-

magnetic noise, which is an important consideration in systems that

include telecommunications and/or microprocessors and to meet

government emissions regulations. For inter-digit blanking, all output

drivers can be disabled and all sink drivers turned on with a BLANK-

ING input high. The pnp active pull-downs will sink at least 2.5 mA.

commercial (suffix S-) or industrial (suffix E-) applications. Package

styles are provided for through-hole DIP (suffix -A) and surface-mount

SOIC or PLCC (suffix -LW or -EP). Copper lead frames, low logic-

power dissipation, and low output-saturation voltages allow all devices

to source 25 mA from all outputs continuously at up to 83 C.

temperature range (E- or S-) and package type (-A, -EP, or -LW).

Always order by complete part number, e.g., A6811SLW .

Controlled Output Slew Rate

High-Speed Data Storage

60 V Minimum

Output Breakdown

High Data Input Rate

PNP Active Pull-Downs

Low Output-Saturation Voltages

The A6811– devices combine a 12-bit CMOS shift register,

The CMOS shift register and latches allow direct interfacing with

A CMOS serial data output permits cascade connections in applica-

The A6811– output source drivers are npn Darlingtons, capable of

Two temperature ranges are available for optimum performance in

Complete part number includes a suffix to identify operating

DABiC-IV, 12-BIT SERIAL-INPUT,

LATCHED SOURCE DRIVER

Low-Power CMOS Logic

and Latches

Improved Replacements

for SN75512B, UCN5811–,

and UCQ5811–

Related parts for a6811ea

a6811ea Summary of contents

Page 1

OUT 11 19 OUT 2 12 BLNK BLANKING 3 18 SERIAL 17 4 DATA OUT SERIAL DATA IN LOGIC SUPPLY 14 7 CLOCK CLK 8 13 STROBE ST 9 OUT ...

... SUPPLY GROUND 15 CLOCK 14 OUT 6 STROBE OUT OUT Dwg. PP-059 2.5 2.0 1.5 1 0.5 OUT 115 Northeast Cutoff, Box 15036 Worcester, Massachusetts 01615-0036 (508) 853-5000 Copyright © 2000, Allegro MicroSystems, Inc BLNK CLK ...

Page 3

CLOCK SERIAL DATA IN STROBE BLANKING GROUND OUT Serial Shift Register Contents Data Clock Input Input ... N ... N ... R ...

Page 4

SERIAL-INPUT, LATCHED SOURCE DRIVER Characteristic Symbol Output Leakage Current I CEX Output Voltage V OUT(1) V OUT(0) Output Pull-Down Current I OUT(0) Input Voltage V IN(1) V IN(0) Input Current I IN(1) I IN(0) Input Clamp Voltage V ...

Page 5

CLOCK SERIAL DATA IN SERIAL DATA OUT STROBE BLANKING OUT BLANKING OUT A. Data Active Time Before Clock Pulse (Data Set-Up Time), t ......................................... 25 ns su(D) B. Data Active Time After Clock Pulse (Data Hold Time), t ............................................... 25 ...

Page 6

SERIAL-INPUT, LATCHED SOURCE DRIVER 20 0.280 0.240 1 0.070 0.045 0.210 MAX 0.015 MIN 0.022 0.014 20 7.11 6.10 1 1.77 1.15 5.33 MAX 0.39 MIN 0.558 0.356 NOTES: 1. Exact body and lead configuration at vendor’s option ...

Page 7

... The products described here are manufactured under one or more U.S. patents or U.S. patents pending. Allegro MicroSystems, Inc. reserves the right to make, from time to time, such departures from the detail specifications as may be required to permit improvements in the performance, reliability, or manufacturability of its products. Before placing an order, the user is cautioned to verify that the information being relied upon is current ...

Page 8

SERIAL-INPUT, LATCHED SOURCE DRIVER 0.0926 0.1043 NOTES: 1. Exact body and lead configuration at vendor’s option within limits shown. 2. Lead spacing tolerance is non-cumulative. Dimensions in Inches (for reference only 0.2992 0.2914 0.020 1 2 ...

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