l99pm62gxp STMicroelectronics, l99pm62gxp Datasheet - Page 72
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l99pm62gxp
Manufacturer Part Number
l99pm62gxp
Description
Power Management Ic With Lin And High Speed Can
Manufacturer
STMicroelectronics
Datasheet
1.L99PM62GXP.pdf
(102 pages)
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ST SPI
6.1.5
Note:
6.1.6
72/102
1
2
Address mapping
Table 48.
The RAM memory area consists of 16 bit registers.
For the device information (ROM memory area) the eight most significant bits of the memory
cell are used. The remaining 8 are zero.
All unused RAM and ROM addresses is read as ‘0’.
The register definition for RAM address 00H is unused. A register value of all 0 must cause
the device to enter a fail-safe state (interpreted as ‘SDI stuck to GND’ failure).
ROM address 3FH is unused. An attempt to access this address must be recognized as a
communication error (‘SDI stuck to V
safe state.
Write operation
The write operation starts with a command byte followed by 2, data bytes. The number of
data bytes is specified in the <SPI-frame-ID>.
Write command format
Table 49.
adress
RAM
3FH
13H
12H
11H
06H
05H
04H
03H
02H
01H
00H
MSB
0
Op Code
Address mapping
Write command format: command byte
Control register 6
Control register 5
Control register 4
Control register 3
Control register 2
Control register 1
Status register 3
Status register 2
Status register 1
<Configuration>
Description
0
Reserved
A5
Doc ID 17639 Rev 3
Access
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
CC
R
R
R
A4
’ failure) and must cause the device to enter a fail-
A3
adress
ROM
3EH
3FH
03H
02H
01H
00H
Address
…
A2
<product code 2>
<product code 1>
<silicon version>
<SPI frame ID>
<ID Header>
Description
Reserved
Unused
A1
L99PM62GXP
Access
LSB
A0
N/A
N/A
N/A
R
R
R
R