ncv8518 ON Semiconductor, ncv8518 Datasheet - Page 10

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ncv8518

Manufacturer Part Number
ncv8518
Description
5v/250ma Ldo With Watchdog, Wake Up, Reset , Delay And Enable
Manufacturer
ON Semiconductor
Datasheet

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General
regulator featuring low quiescent current (100 mA typical at
250 mA load) and low dropout voltage (450 mV typical at
150 mA). Integrated microprocessor control functions
include Watchdog, Wakeup and RESET. An Enable input is
provided for logic level control of the regulator state. The
combination of low quiescent current and comprehensive
microprocessor interface functions make the NCV8518
ideal for use in both battery operated and automotive
applications.
and thermal runaway conditions. No external components
are required to engage these protective mechanisms. The
device continues to operate through 45 volt input transients,
an important consideration in automotive environments.
Wakeup and Watchdog
microcontroller can transition to a low current consumption
(“sleep”) mode when code execution is suspended or
complete. The NCV8518 Wakeup signal is generated and
output periodically to interrupt sleep mode. The nominal
Wakeup output is a 5 volt square wave (generated from
VOUT) with a duty cycle of 50%, at a frequency determined
by external timing resistor R
edge of the Wakeup signal, the microprocessor will
subsequently output a Watchdog pulse and check its inputs
to decide if it should resume normal operation or remain in
sleep mode.
Watchdog signal, which it expects at least once during each
Wakeup period. When the correct Watchdog signal is
received, the Wakeup output is forced low. Other Watchdog
pulses received within the same cycle are ignored. The
Watchdog circuitry continuously monitors the input
Watchdog signal (WDI) from the microprocessor. The
absence of a falling edge on the Watchdog input during one
Wakeup cycle will cause a Reset pulse to be output at the end
of the Wakeup cycle (see Figure 4).
The NCV8518 is a precision micropower voltage
The NCV8518 is internally protected against short circuit
To
The NCV8518 responds to the falling edge of the
reduce
V
battery
BAT
*C1 required if regulator is located far from power supply filter.
drain, a microprocessor or
R
120 k
DELAY
Delay
. In response to the rising
0.1 mF
C1*
V
Delay
IN
OPERATING DESCRIPTION
Figure 17. Application Circuit
GND
NCV8518
http://onsemi.com
WAKE UP
ENABLE
NCV8518
RESET
V
WDI
10
OUT
RESET
its current state down to V
low) is asserted for any of four conditions:
regardless of the cause of the RESET. After the RESET
returns high, the Wakeup cycle begins again (see Figure 4).
RESET high to Wakeup delay time are all set by one external
resistor, RDelay, according to the following equations:
voltage (~1.25 V) and can be used as a reference for an
external tracking regulator.
Enable
that can be used to turn the regulator on or off. Logic high
enables the regulator; logic low disables it (also called
shutdown). In the disabled/shutdown state, the pass
transistor is off and total quiescent current is less than 1 mA.
RESET Delay Time (seconds) = (5.21
Wakeup Period (seconds) = (4.17
As output voltage falls, the RESET output will maintain
The Wakeup output is pulled low during a RESET
The RESET Delay Time, Wakeup signal frequency and
The voltage present at the Delay pin is a buffered bandgap
This is a standard TTL and CMOS logic compatible input
RESET High to Wakeup Delay Time (seconds) =
1. During power up, RESET is held low until the
2. During operation, if the output voltage falls below
3. RESET will switch low if the regulator does not
4. Regardless of output voltage, RESET will switch
OK
output voltage is in regulation.
the Reset threshold, RESET switches low, and will
remain low until both the output voltage has
recovered and the Reset delay timer cycle has
completed following that recovery.
receive a Watchdog input signal within a Wakeup
period.
low if the regulator input voltage V
a level required to sustain the internal control
circuits. The specific voltage is temperature
dependent, and is approximately 4.75 V at 20°C.
OFF
Fault
1.0 mF
(2.08
C2
ON
10
OUT
V
RESET
-7
I/O
I/O
DD
) * R
= 1 V. A Reset signal (active
DELAY
10
(W)
10
-7
-8
IN
) * R
) * R
, falls below
DELAY
DELAY
(W)
(W)

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