PI74ALVCH16823A Pericom Semiconductor, PI74ALVCH16823A Datasheet
PI74ALVCH16823A
Manufacturer Part Number
PI74ALVCH16823A
Description
IC 18-BIT INTERFACE-F/F 56-TSSOP
Manufacturer
Pericom Semiconductor
Series
74ALVCHr
Type
D-Type Busr
Datasheet
1.PI74ALVCH16823A.pdf
(7 pages)
Specifications of PI74ALVCH16823A
Function
Master Reset
Output Type
Tri-State Non Inverted
Number Of Elements
2
Number Of Bits Per Element
9
Frequency - Clock
150MHz
Trigger Type
Positive Edge
Current - Output High, Low
24mA, 24mA
Voltage - Supply
2.3 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
56-TSSOP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Delay Time - Propagation
-
1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 1 2 3 4 5 6 7 8 9 0 1 2
1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 1 2 3 4 5 6 7 8 9 0 1 2
Product Features
• Designed for low voltage operation, V
• Hysteresis on all inputs
• Typical V
• Typical V
• Bus Hold retains last active bus state during 3-State,
• Industrial operation at –40°C to +85°C
• Packages available:
Logic Block Diagram
< 0.8V at V
< 2.0V at V
eliminating the need for external pullup resistors
– 56-pin 240 mil wide plastic TSSOP (A)
– 56-pin 300 mil wide plastic SSOP (V)
06-0148
OLP
OHV
CC
CC
(Output Ground Bounce)
= 3.3V, T
(Output V
= 3.3V, T
A
A
OH
= 25°C
= 25°C
Undershoot)
CC
= 2.3V to 3.6V
1
Product Description
The 18-bit PI74ALVCH16823 bus-interface flip-flop is designed for
2.3V to 3.6V V
specifically for driving highly capacitive or relatively low-
impedance loads. This device is particularly suitable for
implementing wider buffer registers, I/O ports, bidirectional bus
drivers with parity, and working registers.
The PI74ALVCH16823 can be used as two 9-bit flip-flops or one
18-bit flip-flop. With the Clock Enable (CLKEN) input LOW, the
D-type flip-flops enter data on the low-to-high transitions of the
clock. Taking CLKEN HIGH disables the clock buffer, thus
latching the outputs. Taking the Clear (CLR) input LOW causes the
Q outputs to go LOW independently of the clock.
A buffered Output Enable (OE) input can be used to place the nine
outputs in either a normal logic state (high or low logic levels) or
high-impedance state. In the high-impedance state, the outputs
neither load nor drive the bus lines significantly. The high-impedance
state and increased drive provide the capability to drive bus lines
without need for interface or pullup components.
The Output Enable (OE) input does not affect the internal operation
of the flip-flops. Old data can be retained or new data can be entered
while the outputs are in the high-impedance state.
To ensure the high-impedance state during power up or power
down, OE should be tied to V
minimum value of the resistor is determined by the current-sinking
capability of the driver.
Active bus-hold circuitry is provided to hold unused or floating
data inputs at a valid logic level.
CC
operation. It features 3-state outputs designed
18-Bit Bus-Interface Flip-Flop
CC
PI74ALVCH16823
with 3-State Outputs
through a pullup resistor; the
PS8103A 05/30/06
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PI74ALVCH16823A Summary of contents
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... Packaging Mechanical Ordering Information Notes: • Thermal characteristics can be found on the company web site at www.pericom.com/packaging/ • Adding an X suffix = Tape/Reel Pericom Semiconductor Corporation • 1-800-435-2336 • www.pericom.com 06-0148 PI74ALVCH16823 18-Bit Bus-Interface Flip-Flop with 3-State Outputs PS8103A 05/30/06 ...